Optimized implementation of (de-)interleaving and rate (de-)matching for 3GPP new radio

A communication device associated with a wireless transmission, the communication device comprising:

• at least one processor having a plurality of registers, the at least one processor in communication with memory, the at least one processor configured to:
• perform one of a low-density parity check, LDPC, decoding process and an LDPC encoding process, the one of the LDPC decoding process and the LDPC encoding process comprising:
• loading a first set of bits, in parallel, into a plurality of registers, the first set of bits being distributed among the plurality of registers;
• one of de-interleaving and interleaving the loaded first set of bits within the plurality of registers by rearranging the loaded first set of bits into one of a de-interleaved and an interleaved second set of bits without accessing the memory;
• and
• after the first set of bits is rearranged into the one of the de-interleaved and the interleaved second set of bits within the plurality of registers, writing the one of the de-interleaved and the interleaved second set of bits, in parallel, from the plurality of registers to memory.