Dynamic signal processing
AssigneeInternational Business Machines Corporation
InventorIvan James Reedman
Life of this patent
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Abstract
As part of a signal processing event, the maximum frequency of an input signal can be determined with a processor. The maximum frequency can be compared to a value generated with a decimator/interpolator. Based on the comparison, the sampling rate for sampling the input signal with the processor can be set as part of the digital signal processing event. The sampling rate can be adjusted as the frequency of the input signal varies during the signal processing event.
Claims17
A computer-implemented method within a computer hardware system including an I/O device, a processor, and a core frequency controller, comprising:
- receiving, by the I/O device, an input signal from an external device;
- determining, with the processor, a maximum frequency of the input signal;
- comparing the maximum frequency to a current decimator/interpolator value that is an amount by which a sampling rate is decimated or interpolated;
- setting, within the core frequency controller and based on the comparison, the sampling rate for sampling the input signal with the processor as part of a digital signal processing event;
- controlling, by the core frequency controller, a processor core frequency of the processor based upon the sampling rate;
- and
- sampling, by the processor using the processor core frequency, the input signal.
A computer hardware system, comprising:
- an I/O device;
- a core frequency controller;
- and
- at least one processor programmed to initiate the following executable operations:
- receiving, by the I/O device, an input signal from an external device
- determining a maximum frequency of the input signal;
- comparing the maximum frequency to a current decimator/interpolator value that is an amount by which a sampling rate is decimated or interpolated;
- setting, within the core frequency controller and based on the comparison, the sampling rate for sampling the input signal with the processor as part of a digital signal processing event;
- controlling, by the core frequency controller, a processor core frequency of the processor based upon the sampling rate;
- and
- sampling, by the processor using the processor core frequency, the input signal.
A computer program product, comprising:
- a computer-readable storage medium having program code stored thereon, the program code, which when executed by a computer hardware system including an I/O device, a processor, and a core frequency controller, causes the computer hardware system to perform:
- receiving, by the I/O device, an input signal from an external device;
- determining, with the processor, a maximum frequency of the input signal;
- comparing the maximum frequency to a current decimator/interpolator value that is an amount by which a sampling rate is decimated or interpolated;
- setting, within the core frequency controller and based on the comparison, the sampling rate for sampling the input signal with the processor as part of a digital signal processing event;
- controlling, by the core frequency controller, a processor core frequency of the processor based upon the sampling rate;
- and
- sampling, by the processor using the processor core frequency, the input signal.
Dependencies are inferred from the claim text.