Current mirror arrangements with semi-cascoding

A electronic device, comprising a current mirror arrangement, the current mirror arrangenment including:

• a current mirror circuit, comprising a first transistor at an input of the current mirror circuit and a second transistor at an output of the current mirror circuit;
• a third transistor;
• a fourth transistor;
• and
• a two-terminal passive network,
• wherein:
• the second transistor is in a common-emitter configuration,
• each of the third transistor and the fourth transistor is in a common-base configuration,
• an output of the second transistor is coupled to an input of the third transistor,
• an output of the third transistor is coupled to an input of the fourth transistor,
• an output of the fourth transistor is coupled to an output of the current mirror arrangement,
• a base terminal of the third transistor is coupled to a first bias voltage,
• a base terminal of the fourth transistor is coupled to a first terminal of the two-terminal passive network and is not coupled to a capacitor that is coupled to a ground potential,
• a second terminal of the two-terminal passive network is coupled to a second bias voltage, and
• an impedance of the two-terminal passive network is such that a voltage swing at the base terminal of the fourth transistor is substantially equal to half of a voltage swing at the output of the fourth transistor.

An electronic device, comprising a current mirror arrangement, the current mirro arrangement including:

• a current mirror circuit, comprising a first transistor at an input of the current mirror circuit and a second transistor at an output of the current mirror circuit;
• a third transistor, coupled to a first bias voltage;
• a fourth transistor;
• and
• a two-terminal component, where a first terminal of the two-terminal component is coupled to the fourth transistor and a second terminal of the two-terminal component is coupled to a second bias voltage,
• wherein:
• an input of the third transistor is coupled to the output of the current mirror circuit,
• an input of the fourth transistor is coupled to an output of the third transistor,
• an output of the fourth transistor is coupled to an output of the current mirror arrangement, and
• the first bias voltage and the second bias voltage are such that a quiescent voltage between a terminal of the third transistor that is coupled to the first bias voltage and the output of the third transistor is substantially equal to a quiescent voltage between a terminal of the fourth transistor that is counted to the first terminal of the two terminal component and the output of the fourth transistor.