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US 11,258,976 B2Granted
Differential amplifier, pixel circuit and solid-state imaging device
AssigneeHamamatsu Photonics K.K.
InventorsSho Morita, Takayuki Kurashina, Hiroo Yamamoto
Life of this patent
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Abstract
A pixel circuit includes a differential amplifier. The differential amplifier includes a non-inverting input terminal, an inverting input terminal, and an output terminal. The differential amplifier includes an input differential pair including first and second NMOS transistors, a current mirror pair including PMOS transistors, and a constant current source including a fifth NMOS transistor. A threshold voltage of each of the first and second NMOS transistors is higher than a threshold voltage of the fifth NMOS transistor. Further, the threshold voltage of each of the first and second NMOS transistors is higher than a threshold voltage of another NMOS transistor.
Claims17
A differential amplifier including a first input terminal, a second input terminal, and an output terminal, the differential amplifier comprising:
- an input differential pair including a first MOS transistor and a second MOS transistor of a first conductivity type, sources of the first MOS transistor and the second MOS transistor being connected to a common node, a gate of the first MOS transistor being connected to the first input terminal, and a gate of the second MOS transistor being connected to the second input terminal;
- a current mirror pair including a third MOS transistor and a fourth MOS transistor of a second conductivity type, a first reference voltage being input to sources of the third MOS transistor and the fourth MOS transistor, a drain of the third MOS transistor being connected to a drain of the first MOS transistor, a drain of the fourth MOS transistor being connected to a drain of the second MOS transistor and the output terminal, and gates of the third MOS transistor and the fourth MOS transistor being connected to the drain of the third MOS transistor;
- and
- a constant current source including a fifth MOS transistor of the first conductivity type, a second reference voltage being input to a source of the fifth MOS transistor, a drain of the fifth MOS transistor being connected to the common node, and a third reference voltage being input to a gate of the fifth MOS transistor, wherein
- a threshold voltage of each of the first MOS transistor and the second MOS transistor is higher than a threshold voltage of the fifth MOS transistor, and
- an impurity concentration in a channel region under the gate of each of the first MOS transistor and the second MOS transistor is higher than an impurity concentration in a channel region under the gate of the fifth MOS transistor.
3 more elements
A pixel circuit comprising a differential amplifier including a first input terminal, a second input terminal, and an output terminal;
- and an integration capacitive element provided between the second input terminal and the output terminal of the differential amplifier and configured to accumulate charges according to a signal input to the second input terminal, the pixel circuit outputting a signal having a value according to an amount of accumulated charges in the integration capacitive element from the output terminal of the differential amplifier, wherein
- the differential amplifier comprises:
- an input differential pair including a first MOS transistor and a second MOS transistor of a first conductivity type, sources of the first MOS transistor and the second MOS transistor being connected to a common node, a gate of the first MOS transistor being connected to the first input terminal, and a gate of the second MOS transistor being connected to the second input terminal;
- a current mirror pair including a third MOS transistor and a fourth MOS transistor of a second conductivity type, a first reference voltage being input to sources of the third MOS transistor and the fourth MOS transistor, a drain of the third MOS transistor being connected to a drain of the first MOS transistor, a drain of the fourth MOS transistor being connected to a drain of the second MOS transistor and the output terminal, and gates of the third MOS transistor and the fourth MOS transistor being connected to the drain of the third MOS transistor;
- and
- a constant current source including a fifth MOS transistor of the first conductivity type, a second reference voltage being input to a source of the fifth MOS transistor, a drain of the fifth MOS transistor being connected to the common node, and a third reference voltage being input to a gate of the fifth MOS transistor, and wherein
- the pixel circuit further comprises a sixth MOS transistor of the first conductivity type including a gate to which a signal output from the output terminal of the differential amplifier is input and constituting a source follower circuit, and a seventh MOS transistor of the first conductivity type connected in series with the sixth MOS transistor, and
- a threshold voltage of each of the first MOS transistor and the second MOS transistor is higher than a threshold voltage of each of the sixth MOS transistor and the seventh MOS transistor.
5 more elements
A differential amplifier including a first input terminal, a second input terminal, and an output terminal, the differential amplifier comprising:
- an input differential pair including a first MOS transistor and a second MOS transistor of a first conductivity type, sources of the first MOS transistor and the second MOS transistor being connected to a common node, a gate of the first MOS transistor being connected to the first input terminal, and a gate of the second MOS transistor being connected to the second input terminal;
- a current mirror pair including a third MOS transistor and a fourth MOS transistor of a second conductivity type, a first reference voltage being input to sources of the third MOS transistor and the fourth MOS transistor, a drain of the third MOS transistor being connected to a drain of the first MOS transistor, a drain of the fourth MOS transistor being connected to a drain of the second MOS transistor and the output terminal, and gates of the third MOS transistor and the fourth MOS transistor being connected to the drain of the third MOS transistor;
- and
- a constant current source including a fifth MOS transistor of the first conductivity type, a second reference voltage being input to a source of the fifth MOS transistor, a drain of the fifth MOS transistor being connected to the common node, and a third reference voltage being input to a gate of the fifth MOS transistor, wherein
- a threshold voltage of each of the first MOS transistor and the second MOS transistor is higher than a threshold voltage of the fifth MOS transistor, and
- a conductivity type or an impurity concentration is different between the gate of each of the first MOS transistor and the second MOS transistor and the gate of the fifth MOS transistor.
3 more elements
Dependencies are inferred from the claim text.