Directed interrupt virtualization with fallback

A computer system for providing an interrupt signal to a guest operating system, the computer system comprising:

• a plurality of processors assigned for usage by the guest operating system, wherein the guest operating system is executed using one or more processors of the plurality of processors assigned for usage by the guest operating system, the computer system configured to perform a method, said method comprising:
• receiving, by a processor of the plurality of processors assigned for usage by the guest operating system, an interrupt signal from a bus connected module, the processor being addressed as a target of the interrupt signal directly by using a logical processor ID of the processor, the interrupt signal being received with an interrupt target ID identifying the processor assigned for usage by the guest operating system as a target processor for handling the interrupt signal;
• checking, by the processor, whether the processor is the target processor identified by the interrupt target ID, the checking comprising performing a comparison of the interrupt target ID with a current interrupt target ID temporarily assigned to the processor;
• and
• accepting, based on the checking indicating a match of the interrupt target ID with the current interrupt target ID, the interrupt signal for handling by the processor.

A computer-implemented method of providing an interrupt signal to a guest operating system executed using one or more processors of a plurality of processors of a computer system assigned for usage by the guest operating system, the computer-implemented method comprising:

• receiving, by a processor of the plurality of processors assigned for usage by the guest operating system, an interrupt signal from a bus connected module, the processor being addressed as a target of the interrupt signal directly by using a logical processor ID of the processor, the interrupt signal being received with an interrupt target ID identifying the processor assigned for usage by the guest operating system as a target processor for handling the interrupt signal;
• checking, by the processor, whether the processor is the target processor identified by the interrupt target ID, the checking comprising performing a comparison of the interrupt target ID with a current interrupt target ID temporarily assigned to the processor;
• and
• accepting, based on the checking indicating a match of the interrupt target ID with the current interrupt target ID, the interrupt signal for handling by the processor.