IR pixel reconfigurable in DI or BDI mode

An infrared imaging device including a set of detection elements, each detection element in the set of detection elements comprising a photodetector associated with and connected to a corresponding reading pixel configured to read a signal generated by the photodetector, the reading pixel being provided with an integration capacitive load for storing charges coming from the photodetector, the reading pixel comprising a first stage coupled to the photodetector and to the integration capacitive load, the first stage being provided with transistors to bias the photodetector,

• the infrared imaging device comprising a biasing control circuit, the biasing control circuit being configured to apply, to the first stage of the reading pixel, a set of biasing potentials, the biasing control circuit being reconfigurable so as to be able to pass from a first configuration to a second configuration and from the second configuration to the first configuration,
• the first configuration being a configuration wherein the biasing control circuit is configured to send a first set of biasing signals to the first stage so that the first stage adopts a first operating mode corresponding to a first biasing mode of the photodetector,
• the second configuration being a configuration wherein the biasing control circuit is configured to send a second set of biasing signals to the first stage, the second set of biasing signals being different from the first set of biasing signals and designed so that the first stage adopts a second operating mode corresponding to a second biasing mode of the photodetector, the first biasing mode of the photodetector being a direct-injection biasing mode for which a set of transistors of the first stage are biased so that the reading pixel has a first input impedance, the second biasing mode of the photodiode being a buffer direct injection biasing mode of the photodetector for which the set of transistors of the first stage are biased so that the reading pixel has a second input impedance lower than the first impedance,
• each detection element of the set of detection elements comprises the corresponding reading pixel,
• the biasing control circuit is external to the set of detection elements,
• the first stage comprises a first direct-injection transistor connected to the photodetector and to the integration capacitive load, the first transistor being connected to a common electrode of a second transistor and of a third transistor, the second transistor and the third transistor being arranged so as to receive biasing signals from the external biasing control circuit, and
• in the second configuration, the biasing control circuit applies a negative potential to an electrode of the second transistor.