Efficient phase calibration methods and systems for serial interfaces

A system comprising:

• a memory storing computer-executable instructions;
• and
• a processor configured to execute the instructions and causes the system to perform operations comprising:
• receiving a serial clock signal;
• receiving a serial data signal;
• sweeping a plurality of phase codes applicable to the serial clock signal to shift a phase of the serial clock signal;
• identifying a first phase code out of the plurality of phase codes, wherein the first phase code causes zero plus a first threshold number of bits extracted from the serial data signal to be a particular value;
• identifying a second phase code out of the plurality of phase codes, wherein the second phase code causes all minus a second threshold number of bits extracted from the serial data signal to be the particular value;
• identifying a third phase code out of the plurality of phase codes, wherein the third phase code causes all minus a third threshold number of bits extracted from the serial data signal to be the particular value;
• identifying a fourth phase code out of the plurality of phase codes, wherein the fourth phase code causes zero plus a first threshold number of bits extracted from the serial data signal to be the particular value;
• determining an average phase code based on the first phase code, the second phase code, the third phase code, and the fourth phase code;
• and
• applying the average phase code to a phase interpolator to shift the phase of the serial clock signal.

A phase calibration method, comprising:

• receiving a serial clock signal;
• receiving a serial data signal;
• sweeping a first window of phase codes, applicable to the serial clock signal to shift a phase of the serial clock signal, to identify an updated first phase code and an updated second phase code, wherein the first window begins at a predetermined first phase code minus a constant and ends at a predetermined second phase code plus the constant;
• identifying the updated first phase code, wherein the updated first phase code causes zero plus a first threshold number of bits extracted from the serial data signal to be a particular value;
• identifying the updated second phase code, wherein the updated second phase code causes all minus a second threshold number of bits extracted from the serial data signal to be the particular value;
• sweeping a second window of phase codes, applicable to the serial clock signal to shift the phase of the serial clock signal, to identify an updated third phase code and an updated fourth phase code, wherein the second window begins at a predetermined third phase code minus the constant and ends at a predetermined fourth phase code plus the constant;
• identifying the updated third phase code, wherein the updated third phase code causes all minus a third threshold number of bits extracted from the serial data signal to be the particular value;
• identifying the updated fourth phase code, wherein the updated fourth phase code causes zero plus a fourth threshold number of bits extracted from the serial data signal to be the particular value;
• determining an average phase code based on the updated first phase code, the updated second phase code, the updated third phase code, and the updated fourth phase code;
• and
• applying the average phase code to a phase interpolator to shift the phase of the serial clock signal.