Dither generation for radio frequency sampling digital-to-analog converters

A circuit, comprising:

• a noise generator having an output;
• a logic gate having first and second inputs and an output, the output of the noise generator is coupled to the second input of the logic gate, and the first input of the logic is configured to receive a previous output bit from the noise generator;
• a waveform storage circuit having first and second control inputs and an output, the output of the logic gate is coupled to the first control input of the waveform storage circuit, the waveform storage circuit is configured to produce a first digital waveform on its output responsive to a first logic state on the output of the logic gate and to produce a second digital waveform on its output responsive to a second logic state on the output of the logic gate;
• and
• a counter having a counter output coupled to the second control input of the waveform storage circuit.

A circuit, comprising:

• a linear feedback shift register (LFSR) having an output;
• a delay element having an input and an output, the output of the LFSR is coupled to the input of the delay element;
• an exclusive-OR (XOR) gate having first and second inputs and an output, the output of the delay element is coupled to a first input of logic gate, and the output of the LFSR is coupled to a second input of the logic gate;
• a waveform storage circuit having first and second control inputs and an output, the output of the logic gate is coupled to the first control input of the waveform storage circuit, the waveform storage circuit is configured to produce a first digital waveform on its output responsive to a first logic state on the output of the logic gate and to produce a second digital waveform on its output responsive to a second logic state on the output of the logic gate;
• and
• a counter having a counter output coupled to the second control input of the waveform storage circuit.

A system, comprising:

• a noise generator having an output;
• a delay element having an input and an output, the output of the noise generator is coupled to the input of the delay element;
• a logic circuit having first and second inputs and first and second outputs, the output of the delay element is coupled to the first input of the logic circuit, and the output of the noise generator is coupled to the second input of the logic circuit;
• a waveform storage circuit having first, second, and third control inputs and an output, the first output of the logic circuit is coupled to the first control input of the waveform storage circuit, the second output of the logic circuit is coupled to the second control input of the waveform storage circuit, and the waveform storage circuit is configured to produce a digital waveform on its output responsive to logic states on the first and second control inputs;
• and
• a counter having a counter output coupled to the third control input of the waveform storage circuit.

A system, comprising:

• a noise generator having an output;
• a delay element having an input and an output, the output of the noise generator is coupled to the input of the delay element;
• a waveform storage circuit having first, second, and third control inputs and an output, the output of the delay element is coupled to the first control input of the waveform storage circuit, the output of the noise generator is coupled to the second control input of the waveform storage circuit, and the waveform storage circuit is configured to produce a digital waveform on its output responsive to logic states on the first and second control inputs;
• and
• a counter having a counter output coupled to the third control input of the waveform storage circuit.