High stability gain structure and filter realization with less than 50 ppm/° c. temperature variation with ultra-low power consumption using switched-capacitor and sub-threshold biasing
AssigneeNortheastern University
InventorAatmesh Shrivastava
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Abstract
An ultra-low power sub-threshold gm stage is disclosed where transconductance is very stable with process, temperature, and voltage variations. This technique can be implemented in a differential amplifier with constant gain and a second order biquad filter with constant cut off frequency. The amplifier gain can achieve a small temperature coefficient of 48.6 ppm/° C. and exhibits small sigma of 75 mdB with process. The second order biquad can achieve temperature stability of 69 ppm/° C. and a voltage coefficient of only 49 ppm/mV.
Claims15
A method comprising:
- generating a biasing current (I0) using a constant gm bias circuit operating in the subthreshold region for ultra-low power consumption, said circuit including a switched capacitor resistor having a first capacitor, wherein the biasing current (I0) is given by:
- I0=VT ln(M)/R1,
- where VT is the thermal voltage of the constant gm bias circuit, where the thermal voltage is kT/q, where k is the Boltzman's constant, T is the temperature in Kelvin, and q is the unit of charge,
- M is a multiplication factor relating two transistors in the constant gm bias circuit,
- R1=1/f1C1,
- C1 is a capacitance of the first capacitor, and
- f1 is a frequency of a reference clock of the constant gm bias circuit;
- and
- biasing a differential amplifier with the biasing current, the differential amplifier including a load switched capacitor resistor having a second capacitor, wherein the differential amplifier has constant gain (Av), independent of manufacturing process variation or temperature variation, given by:
- Av=ln(M)f1C1/ηf3C3,
- where η is a process constant value for the differential amplifier,
- C3 is a capacitance of the second capacitor, and
- f3 is a frequency of the load switched capacitor resistor of the differential amplifier.
A differential amplifier circuit, comprising:
- (a) a constant gm bias circuit operating in the subthreshold region for ultra-low power consumption generating a biasing current (I0), said constant gm bias circuit including a switched capacitor resistor having a first capacitor, wherein the biasing current (I0) is given by:
- I0=VT ln(M)/R1,
- where VT is the thermal voltage of the constant gm bias circuit, where the thermal voltage is kT/q, where k is the Boltzman's constant, T is the temperature in Kelvin, and q is the unit of charge,
- M is a multiplication factor relating two transistors in the constant gm bias circuit,
- R1=1/f1C1,
- C1 is a capacitance of the first capacitor, and
- f1 is a frequency of a reference clock of the constant gm bias circuit;
- and
- (b) a differential amplifier biased with the biasing current, the differential amplifier including a load switched capacitor resistor having a second capacitor, wherein the differential amplifier has constant gain (Av) given by:
- Av=ln(M)f1C1/ηf3C3
- where η is a process constant value for the differential amplifier;
- C3 is a capacitance of the second capacitor, and
- f3 is a frequency of the load switched capacitor resistor of the differential amplifier.
A second-order biquad filter, comprising:
- (a) a constant gm bias circuit operating in the subthreshold region for ultra-low power consumption generating a biasing current (I0), said constant gm bias circuit including a switched capacitor resistor having a first capacitor, wherein the biasing current (I0) is given by:
- I0=VT ln(M)/R1,
- where VT is the thermal voltage of the constant gm bias circuit, where the thermal voltage is kT/q, where k is the Boltzman's constant, T is the temperature in Kelvin, and q is the unit of charge,
- M is a multiplication factor relating two transistors in the constant gm bias circuit,
- R1=1/f1C1,
- C1 is a capacitance of the first capacitor, and
- f1 is a frequency of a reference clock of the constant gm bias circuit;
- and
- (b) a second order biquad filter biased with the biasing current to obtain a stable cut-off frequency.
A method comprising:
- generating a biasing current (I0) using a constant gm bias circuit operating in the subthreshold region for ultra-low power consumption, said circuit including a switched capacitor resistor having a first capacitor, wherein the biasing current (I0) is given by:
- I0=VT ln(M)/R1,
- where VT is the thermal voltage of the constant gm bias circuit, where the thermal voltage is kT/q, where k is the Boltzman's constant, T is the temperature in Kelvin, and q is the unit of charge,
- M is a multiplication factor relating two transistors in the constant gm bias circuit,
- R1=1/f1C1,
- C1 is a capacitance of the first capacitor, and
- f1 is a frequency of a reference clock of the constant gm bias circuit, and
- wherein generating a biasing current (I0) includes suppressing ripple originating from the switched capacitor resistor in the constant gm bias circuit using one or more decoupling capacitors.
A method comprising:
- generating a biasing current (I0) using a constant gm bias circuit operating in the subthreshold region for ultra-low power consumption, said circuit including a switched capacitor resistor having a first capacitor, wherein the biasing current (I0) is given by:
- I0=VT ln(M)/R1,
- where VT is the thermal voltage of the constant gm bias circuit, where the thermal voltage is kT/q, where k is the Boltzman's constant, T is the temperature in Kelvin, and q is the unit of charge,
- M is a multiplication factor relating two transistors in the constant gm bias circuit,
- R1=1/f1C1,
- C1 is a capacitance of the first capacitor, and
- f1 is a frequency of a reference clock of the constant gm bias circuit;
- and
- biasing a second order biquad filter with the biasing current to obtain a stable cut-off frequency.
Dependencies are inferred from the claim text.