Semiconductor device and method for manufacturing the same

A method for manufacturing a semiconductor device, wherein the method for manufacturing the semiconductor device comprises the following steps:

• step 1:
• providing a semiconductor substrate;
• etching the semiconductor substrate in a forming area of an embedded gate structure to form a first groove, a bottom surface of the first groove being arranged below a maximum stress position of a subsequently formed embedded epitaxial layer;
• and filling a first dielectric layer in the first groove;
• step 2:
• forming a second groove in the forming area of a source region or a drain region on two sides of the embedded gate structure, and filling the embedded epitaxial layer in the second groove, wherein a cross section of the second groove in a Σ shape and the maximum stress position of the embedded epitaxial layer is located at a sharp corner of the Σ shape of the cross section of the second groove;
• step 3:
• removing the first dielectric layer;
• step 4:
• filling a first epitaxial layer in the first groove to raise the bottom surface of the first groove to be in flush with the maximum stress position of the embedded epitaxial layer;
• and
• step 5:
• sequentially forming a gate dielectric layer and a gate conducting material layer, the embedded gate structure comprising a structure formed by superposing the gate dielectric layer and the gate conducting material layer, wherein
• the embedded gate structure is divided into an embedded part embedded in the semiconductor substrate and a protruding part located on a surface of the semiconductor substrate;
• the embedded part of the embedded gate structure consists of the gate dielectric layer formed on the bottom surface and the side surfaces of the first groove and the gate conducting material layer filled in the first groove, and the protruding part of the embedded gate structure is formed by the gate dielectric layer and the gate conducting material layer extending from the first groove to the surface of the semiconductor substrate;
• a channel region is formed below the bottom surface of the embedded gate structure, and the surface of the channel region covered by the bottom surface of the embedded gate structure is used to form a channel;
• and the embedded epitaxial layer is used to provide stress for the channel region, and a structure that the bottom surface of the embedded gate structure is in flush with the maximum stress position of the embedded epitaxial layer enables the channel region to be subjected to a maximum stress and mobility of channel carriers to be improved.