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US 11,239,361 B2Granted
Multilayer insulator stack for ferroelectric transistor and capacitor
AssigneeIntel Corporation
InventorsUygar E. Avci, Joshua M. Howard, Seiyon Kim, Ian A. Young
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Abstract
Described is an apparatus which comprises: a first layer comprising a semiconductor; a second layer comprising an insulating material, the second layer adjacent to the first layer; a third layer comprising a high-k insulating material, the third layer adjacent to the second layer; a fourth layer comprising a ferroelectric material, the fourth layer adjacent to the third layer; and a fifth layer comprising a high-k insulating material, the fifth layer adjacent to the fourth layer.
Claims22
An apparatus comprising:
- a first layer comprising a semiconductor;
- a second layer comprising an insulative material, the second layer adjacent to the first layer;
- a third layer comprising a high-k insulative material, the third layer adjacent to the second layer;
- a fourth layer comprising a ferroelectric material, the fourth layer adjacent to the third layer;
- a fifth layer comprising a high-k insulative material, the fifth layer connected to the fourth layer and the fifth layer having a thickness of not more than 20 Angstroms;
- and
- a sixth layer comprising metal, the sixth layer connected to the fifth layer.
4 more elements
An apparatus comprising:
- a first layer comprising metal;
- a second layer comprising metal;
- and
- a plurality of layers coupled between the first and second metal layers, wherein the plurality of layers comprise:
- a third layer comprising an insulative material, the third layer adjacent to the second layer;
- a fourth layer comprising a high-k insulative material, the fourth layer adjacent to the third layer;
- a fifth layer comprising a ferroelectric material, the fifth layer adjacent to the third layer;
- and
- a sixth layer comprising a high-k insulative material, the sixth layer connected to the fifth layer and the first layer, and the sixth layer having a thickness of not more than 20 Angstroms.
6 more elements
A system comprising:
- a memory;
- a processor coupled to the memory, the processor including a ferroelectric transistor comprising:
- a first layer comprising a semiconductor;
- a second layer comprising an insulative material, the second layer adjacent to the first layer;
- a third layer comprising a high-k insulative material, the third layer adjacent to the second layer;
- a fourth layer comprising a ferroelectric material, the fourth layer adjacent to the third layer;
- a fifth layer comprising a high-k insulative material, the fifth layer connected to the fourth layer and the fifth layer having a thickness of not more than 20 Angstroms;
- and
- a sixth layer comprising metal, the sixth layer connected to the fifth layer;
- and a wireless interface to allow the processor to communicate with another device.
7 more elements
Dependencies are inferred from the claim text.