Dual trench isolation structures
AssigneeGlobalFoundries U.S. Inc.
InventorsShiv Kumar Mishra, Baofu Zhu, Arkadiusz Malinowski, Kaushikee Mishra
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Abstract
The present disclosure generally relates to semiconductor structures and, more particularly, to dual trench isolation structures and methods of manufacture. The structure includes: a doped well region in a substrate; a dual trench isolation region within the doped well region, the dual trench isolation region comprising a first isolation region of a first depth and a second isolation region of a second depth, different than the first depth; and a gate structure on the substrate and extending over a portion of the dual trench isolation region.
Claims20
A structure, comprising:
- a doped well region in a substrate;
- a dual trench isolation region within the doped well region, the dual trench isolation region comprising a first isolation region of a first depth and a second isolation region of a second depth, different than the first depth;
- and
- a gate structure on the substrate and extending over a portion of the dual trench isolation region,
- wherein the gate structure comprises a gate dielectric material extending to the first isolation region and gate electrode material, the gate electrode material directly contacts an upper surface of the first isolation region, covers the gate dielectric material, and overlaps an edge of the gate dielectric material that extends to the first isolation region.
A structure, comprising:
- a first well region in a substrate;
- a second well region in the substrate;
- a dual trench isolation region in the first well region, the dual trench isolation region composed of a shallow trench isolation structure and a deep trench isolation structure on a side adjacent to and connecting with the shallow trench isolation structure;
- and
- a gate structure spanning over the first well region and the second well region, the gate structure extending to the shallow trench isolation structure of the dual trench isolation region, wherein a gate dielectric material of the gate structure extends to an edge of the shallow trench isolation structure and a gate electrode material of the gate structure directly contacts an upper surface of the shallow trench isolation structure, directly contacts an upper surface and covers the gate dielectric material, and overlaps beyond an edge of the shallow trench isolation structure and the gate dielectric material.
A method, comprising:
- forming a doped well region in a substrate;
- forming a dual trench isolation region within the doped well region, the dual trench isolation region comprising a first isolation region of a first depth and a second isolation region of a second depth, different than the first depth;
- and
- forming a gate structure on the substrate and extending over a portion of the dual trench isolation region,
- wherein the gate structure comprising forming a gate dielectric material to an edge of the first isolation region and a gate electrode material directly contacting an upper surface of the first isolation region, the gate electrode material covering the gate dielectric material and overlapping an edge of the gate dielectric material that extends to the first isolation region.
Dependencies are inferred from the claim text.