Semiconductor structure for preventing row hammering issue in DRAM cell and method for manufacturing the same

A method of manufacturing a semiconductor device for preventing row hammering issue in DRAM cell, comprising:

• providing a substrate;
• forming a trench in said substrate;
• forming a gate dielectric conformally on said trench;
• forming an n-type work function metal layer conformally on said substrate and said gate dielectric;
• forming a titanium nitride layer conformally on said n-type work function metal layer by performing a nitrogen radical treatment to a surface of said n-type work function metal layer so that a portion of said n-type work function metal layer is transformed into said titanium nitride layer;
• and
• filling a buried word line in said trench.