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US 11,239,241 B2Granted
Bit line utilized in DRAM
AssigneesUnited Microelectronics Corp., Fujian Jinhua Integrated Circuit Co., Ltd.
InventorsPin-Hong Chen, Yi-Wei Chen, Chih-Chieh Tsai, Tzu-Chieh Chen, Tsun-Min Cheng, Chi-Mao Hsu
Life of this patent
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Abstract
A fabricating method of a semiconductive element includes providing a substrate, wherein an amorphous silicon layer covers the substrate. Then, a titanium nitride layer is provided to cover and contact the amorphous silicon layer. Later, a titanium layer is formed to cover the titanium nitride layer. Finally, a thermal process is performed to transform the titanium nitride layer into a nitrogen-containing titanium silicide layer.
Claims6
A bit line utilized in a DRAM, comprising:
- a conductive silicon layer;
- a nitrogen-containing titanium silicide/titanium silicide mixture contacting the conductive silicon layer, wherein the nitrogen-containing titanium silicide/titanium silicide mixture comprises nitrogen-containing titanium silicide and titanium silicide, and the nitrogen-containing titanium silicide layer comprises a nitrogen concentration, the nitrogen concentration changes in gradient, and the nitrogen concentration decreases in a direction away from the conductive silicon layer;
- and
- a conductive layer covering the nitrogen-containing titanium silicide/titanium silicide mixture, wherein the conductive layer comprises a titanium nitride, a metal silicide and a metal layer.
1 more element
Dependencies are inferred from the claim text.