Forksheet transistor architectures

A semiconductor device, comprising:

• a backbone having a first edge and a second edge, wherein the backbone is an insulative material, and a liner is over a portion of the first edge of the backbone and over a portion of the second edge of the backbone;
• a first transistor adjacent to the first edge of the backbone;
• and
• a second transistor adjacent to the second edge of the backbone, wherein individual ones of the first transistor and the second transistor comprise:
• a source;
• a drain;
• a semiconductor channel between the source and the drain, wherein an edge of the semiconductor channel closest to the backbone is spaced away from the first edge of the backbone or the second edge of the backbone;
• a gate dielectric completely surrounding a perimeter of the semiconductor channel;
• and
• a gate electrode completely surrounding the gate dielectric.

An electronic system, comprising:

• a board;
• an electronic package connected to the board;
• and
• a die electrically coupled to the electronic package, wherein the die comprises:
• a backbone having a first edge and a second edge, wherein the backbone is an insulative material, and a liner is over a portion of the first edge of the backbone and over a portion of the second edge of the backbone;
• a first transistor adjacent to the first edge of the backbone;
• a second transistor adjacent to the second edge of the backbone;
• and
• an interconnect to electrically couple the first transistor to the second transistor, wherein the interconnect passes through the backbone.

A semiconductor device, comprising:

• a backbone having a first edge and a second edge, wherein the backbone is an insulative material;
• a liner below the backbone, wherein the liner is a material that has an etch selectivity to a material of the backbone;
• a first transistor adjacent to the first edge of the backbone;
• and
• a second transistor adjacent to the second edge of the backbone, wherein individual ones of the first transistor and the second transistor comprise:
• a source;
• a drain;
• a semiconductor channel between the source and the drain, wherein an edge of the semiconductor channel closest to the backbone is spaced away from the first edge of the backbone or the second edge of the backbone;
• a gate dielectric completely surrounding a perimeter of the semiconductor channel;
• and
• a gate electrode completely surrounding the gate dielectric.