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US 11,239,235 B2Granted
Transistor and logic gate
AssigneeChen-Chih Wang
InventorsChen-Chih Wang, Li-Wei Ho
Life of this patent
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Abstract
A transistor includes a substrate having a plurality of source/drain regions and a channel region between the source/drain regions, a gate, and a gate dielectric layer between the gate and the substrate. The substrate tapers in a direction away from the gate dielectric layer in top view. The gate is embedded in the gate dielectric layer. The transistor structure density can be improved.
Claims20
A transistor, comprising:
- a substrate having a plurality of source/drain regions and a channel region between the source/drain regions;
- a gate;
- and
- a gate dielectric layer between the gate and the substrate, wherein the substrate tapers in a direction away from the gate dielectric layer in top view, and wherein the gate is embedded in the gate dielectric layer.
1 more element
Dependencies are inferred from the claim text.