Semiconductor package including a first sub-package stacked atop a second sub-package

A semiconductor package, comprising:

• a first sub-package stacked atop a second sub-package, each of the first sub-package and the second sub-package comprising:
• at least two first semiconductor dies and a second semiconductor die disposed in between thereof, wherein each of the first semiconductor dies comprises a plurality of through silicon vias (TSVs);
• a plurality of molding pieces disposed between each of the first semiconductor dies and the second semiconductor die, wherein upper surfaces of the TSVs, upper surfaces of the molding pieces, upper surfaces of the first semiconductor dies and an upper surface of the second semiconductor die are coplanar;
• a bond-pad layer disposed over the upper surfaces of the TSVs, the upper surfaces of the molding pieces, the upper surfaces of the first semiconductor dies and the upper surface of the second semiconductor die, wherein the bond-pad layer of each of the first sub-package and the second sub-package comprises active pads and dummy pads, each of the active pads is disposed on a corresponding one of the upper surfaces of the TSVs and the dummy pads are disposed on the second semiconductor die;
• a plurality of redistribution layers (RDLs) disposed underneath lower surfaces of the TSVs, lower surfaces of the molding pieces, lower surfaces of the first semiconductor dies and a lower surface of the second semiconductor die;
• and
• a plurality of bumps connecting to the RDLs,
• wherein the bumps of the first sub-package are attached to the bond-pad layer of the second sub-package.