Semiconductor die for determining load of through silicon via and semiconductor device including the same

A semiconductor device, comprising:

• a first semiconductor die including at least one first through silicon via;
• and
• a second semiconductor die stacked on the first semiconductor die, the second semiconductor die including,
• first delay stages connected in series, the first delay stages including output terminals, one of the first delay stages configured to output a first delay signal,
• second delay stages connected in series, one of the second delay stages configured to output a second delay signal,
• at least one second through silicon via electrically connected to at least one of the output terminals of the first delay stages and the at least one first through silicon via,
• a transmitter configured to transmit a test signal received from the first semiconductor die to the first delay stages and the second delay stages, and
• processing circuitry configured to determine a load of the at least one first through silicon via and the at least one second through silicon via based on the first delay signal and the second delay signal.