Terminal structure of a power semiconductor device

A method of processing a power semiconductor device, the method comprising:

• providing a semiconductor body configured to conduct a load current;
• forming a first load terminal electrically connected with the semiconductor body and configured to couple the load current into and/or out of the semiconductor body, wherein the first load terminal comprises a metallization having a frontside and a backside, the backside interfacing with a surface of the semiconductor body and the frontside being configured to interface with a wire structure having at least one wire configured to conduct at least a part of the load current, wherein forming the first load terminal further comprises:
• laterally structuring the frontside of the metallization by forming at least one local elevation of the metallization so that the metallization has a local increase of depth in a region of the at least one local elevation and a lesser, non-zero depth outside the region of the at least one local elevation, the at least one local elevation having a height in an extension direction defined by the distance between a base and a top of the local elevation and, in a first lateral direction perpendicular to the extension direction, a base width at the base and a top width at the top, wherein the at least one local elevation is formed such that the top width amounts to less than 90% of the base width, wherein there is neither a material barrier within the at least one local elevation itself nor between the at least one local elevation and a remaining section of the metallization outside the region of the at least one local elevation.