Semiconductor package
AssigneesSamsung Electronics Co., Ltd., Industry-University Cooperation Foundation Hanyang Univ.
InventorsYoung-Ho Kim, Hwan Pil Park, Sung-Chul Kim, Key-One Ahn
Life of this patent
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Abstract
A semiconductor package includes: a substrate; a semiconductor chip disposed on a first surface of the substrate; solder bumps disposed between a first surface of the semiconductor chip and the substrate; and a redistribution layer provided on a second surface, opposite to the first surface, of the semiconductor chip. The substrate includes substrate patterns, and the substrate patterns cover a second surface of the substrate. The substrate patterns cover 60% to 100% of a total area of the second surface of the substrate.
Claims20
A semiconductor package comprising:
- a substrate;
- a semiconductor chip disposed on a first surface of the substrate;
- solder bumps disposed between a first surface of the semiconductor chip and the substrate;
- and
- a redistribution layer provided on a second surface, opposite to the first surface, of the semiconductor chip;
- and
- a ground via penetrating the substrate,
- wherein the substrate comprises substrate patterns and an antenna pattern, wherein the ground via is connected to the antenna pattern,
- wherein the substrate patterns cover a second surface of the substrate, and
- wherein the substrate patterns cover 60% to 100% of a total area of the second surface of the substrate.
A semiconductor package comprising:
- a substrate;
- a semiconductor chip mounted on a first surface of the substrate;
- solder bumps disposed between a first surface of the semiconductor chip and the first surface of the substrate;
- a shielding layer disposed between the semiconductor chip and the solder bumps;
- and
- a redistribution layer provided on a second surface, opposite to the first surface, of the semiconductor chip,
- wherein the substrate comprises substrate patterns and an antenna pattern, and
- wherein the substrate patterns cover a second surface of the substrate.
A semiconductor package comprising:
- a substrate;
- a semiconductor chip mounted on a first surface of the substrate;
- solder bumps disposed between a first surface of the semiconductor chip and the substrate;
- a solder mask provided on the first surface of the substrate;
- a shielding layer disposed between the semiconductor chip and the solder bumps;
- a redistribution layer provided on a second surface, opposite to the first surface, of the semiconductor chip;
- a molding layer covering a sidewall of the semiconductor chip, and provided between substrate and the redistribution layer;
- and
- vias penetrating the substrate and the molding layer,
- wherein the substrate comprises substrate patterns and an antenna pattern,
- wherein the substrate patterns cover a second surface of the substrate,
- wherein the solder bumps are disposed in regions formed by the solder mask,
- wherein the vias comprise a ground via, a signal via, and a power via,
- wherein the redistribution layer is electrically connected to the semiconductor chip, and
- wherein the shielding layer comprises an adhesive layer, a shielding metal layer, and a protective layer.
Dependencies are inferred from the claim text.