Flexible circuit board and chip package including same
AssigneeLG Innotek Co., Ltd.
InventorsJun Young Lim, Hyung Kyu Yoon, Sung Min Chae
Life of this patent
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Abstract
A flexible circuit board according to an embodiment of the present invention comprises: a substrate; a first wiring pattern layer disposed on a first surface of the substrate; a second wiring pattern layer disposed on a second surface opposite the first surface of the substrate; a first dummy pattern part disposed on the second surface of the substrate on which the second wiring pattern layer is not disposed; a first protection layer disposed on the first wiring pattern layer; and a second protection layer disposed on the second wiring pattern layer and the first dummy pattern part, wherein at least a part of the first dummy pattern part overlaps with the first wiring pattern layer in a vertical direction.
Claims20
A flexible circuit board comprising:
- a substrate;
- a first conductive pattern part disposed on a first surface of the substrate;
- a second conductive pattern part disposed on a second surface opposite to the first surface of the substrate;
- a first dummy pattern part disposed in a region of the second surface of the substrate in which the second conductive pattern part is not disposed;
- a first protection layer disposed on the first conductive pattern part;
- and
- a second protection layer disposed on the second conductive pattern part and the first dummy pattern part,
- wherein the first conductive pattern part at an outermost periphery of the substrate is covered by the first protective layer, and
- wherein the first dummy pattern part is vertically overlapped with the first conductive pattern part disposed at the outermost periphery of the substrate and the first protective layer.
A chip package which comprises a flexible circuit board for all-in-one chip on film, the flexible circuit board comprising:
- a substrate;
- a conductive pattern part disposed on the substrate;
- a dummy pattern part disposed on the substrate;
- and
- a protective part disposed on one region on the conductive pattern part and the dummy pattern part,
- wherein the conductive pattern part includes
- a first wiring pattern layer disposed on a first surface of the substrate,
- a first plating layer disposed on the first wiring pattern layer,
- a second wiring pattern layer disposed on a second surface of the substrate opposite to the first surface of the substrate,
- a second plating layer disposed on the second wiring pattern layer,
- wherein at least a part of the first and second plating layers are exposed through a first open region and a second open region of the protective part, a content of tin (Sn) of at least a part of the first and second plating layers exposed through the first open region is greater than that of at least a part of the first and second plating layers exposed through the second open region, and
- a first chip disposed in the first open region, and a second chip disposed in the second open region,
- wherein the dummy pattern part includes a first dummy pattern part which is disposed on the second surface of the substrate on which the second wiring pattern layer is not disposed and at least a portion of which is vertically overlapped with the first wiring pattern layer, and
- a second dummy pattern part which is disposed on the first surface of the substrate on which the first wiring pattern layer is not disposed and at least a part of which is vertically overlapped with the second wiring pattern layer,
- wherein the first dummy pattern part is vertically overlapped with the first conductive pattern part disposed at an outermost periphery of the first conductive pattern part, and
- the second dummy pattern part is vertically overlapped with the second conductive pattern part disposed at an outermost periphery of the second conductive pattern part.
Dependencies are inferred from the claim text.