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US 11,239,169 B1Granted
Semiconductor memory stacks connected to processing units and associated systems and methods
AssigneeMicron Technology, Inc.
InventorKyle K. Kirby
Life of this patent
Estimating the term…
Abstract
A semiconductor memory stack connected to a processing unit, and associated methods and systems are disclosed. In some embodiments, the semiconductor memory stack may include one or more memory dies attached to and carried by a memory controller die—e.g., high-bandwidth memory. Further, a processing unit (e.g., a processor) may be attached to the memory controller die without an interposer to provide the shortest possible route for signals traveling between the semiconductor memory stack and the processing unit. In addition, the semiconductor memory stack and the processing unit can be attached to a package substrate without an interposer.
Claims20
A semiconductor die assembly, comprising:
- a memory controller die carrying a stack of memory dies on a front side thereof, wherein an edge of the memory controller die extends past a corresponding edge of the stack of memory dies such that a portion of the front side of the memory controller die is uncovered by the stack of memory dies, the portion including a plurality of first conductive components;
- a processor die including a first group of second conductive components in a first region of a front side of the processor die and a second group of second conductive components in a second region of the front side of the processor die, wherein the processor die is arranged over the memory controller die such that the first region of the processor die faces the portion of the memory controller die, and each of the first conductive components is coupled with a corresponding one of the second conductive components of the first group;
- and
- a substrate carrying both the memory controller die and the processor die, the substrate including a second set of third conductive components in a second section of the substrate, wherein the processor die is arranged over the substrate such that the second region of the processor die faces the second section, and each of the second conductive components of the second group is coupled with a corresponding one of the third conductive components of the second set.
1 more element
A method comprising:
- attaching a stack of memory dies on a front side of a memory controller die such that a portion of the front side is exposed, the exposed portion including a plurality of first conductive components;
- attaching the memory controller die carrying the stack of memory dies to a first set of third conductive components in a first section of a substrate, the substrate also including a second set of third conductive components in a second section of the substrate;
- and
- attaching a processor die to the memory controller die and to the substrate, the processor die including a first group of second conductive components in a first region of a front side of the processor die and a second group of second conductive components in a second region of the front side of the processor die, such that 1) the first region faces the exposed portion of the memory controller die and each of the first conductive components is coupled with a corresponding one of the second conductive components of the first group, and 2) the second region faces the second section of the substrate and each of the second conductive components of the second group is coupled with a corresponding one of the third conductive components of the second set.
1 more element
A semiconductor die assembly, comprising:
- a first memory controller carrying a first stack of memory dies on a front side thereof, wherein an edge of the first memory controller extends past a corresponding edge of the first stack of memory dies such that a portion of the front side of the first memory controller is exposed, the exposed portion including a first plurality of conductive components;
- a second memory controller carrying a second stack of memory dies on a front side thereof, wherein an edge of the second memory controller extends past a corresponding edge of the second stack of memory dies such that a portion of the front side of the second memory controller is exposed, the exposed portion including a second plurality of conductive components;
- a processor including first, second, and third groups of conductive components on a front side thereof, wherein the processor is arranged over both the first and second memory controllers such that each of the conductive components of the first plurality is coupled with a corresponding one of the conductive components of the first group, and each of the conductive components of the second plurality is coupled with a corresponding one of the conductive components of the third group;
- and
- a substrate carrying the first and second memory controller and the processor, the substrate including a second set of conductive components, wherein the processor is arranged over the substrate such that each of the conductive components of the second group is coupled with a corresponding one of the conductive components of the second set.
2 more elements
Dependencies are inferred from the claim text.