US 11,239,156 B2Granted

Planar slab vias for integrated circuit interconnects

AssigneeIntel Corporation

InventorsElijah Karpov, Manish Chandhok, Nafees Kabir

Life of this patent

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Abstract

Integrated circuitry comprising devices electrically coupled through a plurality of interconnect levels in which lines of a first and second interconnect level are coupled through a planar slab via. An interconnect line may include a horizontal line segment within one of the first or second interconnect levels, and the slab via may be a vertical line segment between the first and second interconnect levels. A planar slab via may comprise one or more layers of conductive material, which have been deposited upon a planarized substrate material that lacks any features that the conductive material must fill. A planar slab via may be subtractively defined concurrently with a horizontal line of one or both of the first or second interconnect levels.

Claims15

Dependent claims

An integrated circuit (IC) structure, comprising:

a device level comprising a plurality of device structures;
and
an electrical interconnect structure coupling the device structures into circuitry, wherein the electrical interconnect structure comprises:
a first interconnect line in a first interconnect level, the first interconnect line having a first surface defining a first plane, wherein the first interconnect line extends in a first direction and has a first width;
a second interconnect line in a second interconnect level, the second interconnect line having a second surface defining a second plane, substantially parallel to the first plane, wherein the second line extends in a second direction, non-parallel to the first direction, and has a second width;
and
a slab via interconnecting the first interconnect line to the second interconnect line, wherein the slab via has a substantially rectangular cross-section within a plane that is at an interface of the first interconnect line or second interconnect line, and that is substantially parallel to the first plane, wherein a cross-section of the slab via at an interface with the first interconnect line has a first dimension in the second direction that is substantially equal to the first width, or wherein a cross-section of the slab via at an interface of the second interconnect line has a second dimension in the first direction that is substantially equal to the second width.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/824,366Filed 19 Mar 2020
Published: US 2021/0296231 A123 Sep 2021
Granted: 1 Feb 2022
Term ends: Not estimatedThe source records don’t support an estimate.

Classification13 codes

H10W 20/069
Of conductive parts of the interconnections: by forming self-aligned vias or self-aligned contact plugs
H10W 20/42
Characterised by their conductive parts: vias, e.g. via plugs
H10W 20/056
Of conductive parts of the interconnections: by filling conductive material into holes, grooves or trenches
H10W 20/063
Of conductive parts of the interconnections: by forming conductive members before forming protective insulating material