Metal interconnect fuse memory arrays
AssigneeIntel Corporation
InventorsVincent Dorgan, Jeffrey Hicks, Uddalak Bhattacharya, Zhanping Chen, Walid Hafez
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AssigneeIntel Corporation
InventorsVincent Dorgan, Jeffrey Hicks, Uddalak Bhattacharya, Zhanping Chen, Walid Hafez
Estimating the term…
Embodiments herein may describe techniques for an integrated circuit including a metal interconnect above a substrate and coupled to a first contact and a second contact. The first contact and the second contact may be above the metal interconnect and in contact with the metal interconnect. A first resistance may exist between the first contact and the second contact through the metal interconnect. After a programming voltage is applied to the second contact while the first contact is coupled to a ground terminal to generate a current between the first contact and the second contact, a non-conducting barrier may be formed as an interface between the second contact and the metal interconnect. A second resistance may exist between the first contact, the metal interconnect, the second contact, and the non-conducting barrier. Other embodiments may be described and/or claimed.
An integrated circuit (IC), comprising:
A method for forming an integrated circuit, the method comprising:
A computing device, comprising:
Dependencies are inferred from the claim text.