Back end memory integration process

A substrate processing method, comprising:

• forming a bottom contact on a substrate;
• depositing a non-metallic interlayer dielectric material on the substrate;
• forming a metallic via extending from the bottom contact through the non-metallic interlayer dielectric material in a first region;
• etching a zero mark in the non-metallic interlayer dielectric material in a second region apart from the first region to a depth less than a total thickness of the non-metallic interlayer dielectric material, wherein the etching a zero mark in the non-metallic interlayer dielectric material is performed prior to conformal deposition of any of a touch layer, a memory stack comprising a plurality of films, wherein at least one film of the plurality of films is a magnesium oxide containing film, or a hardmask;
• conformally depositing the touch layer over the substrate in the first region and the second region;
• conformally depositing the memory stack over the touch layer in the first region and the second region;
• conformally depositing the hardmask over the memory stack in the first region and the second region;
• patterning at least the first region;
• and
• sequentially etching the hardmask, the memory stack, and the touch layer after patterning the first region.

A substrate processing method, comprising:

• forming a bottom contact on a substrate;
• depositing a non-metallic interlayer dielectric material on the substrate;
• etching the non-metallic interlayer dielectric material to expose the bottom contact;
• forming a metallic via extending from the bottom contact in a first region;
• etching a zero mark in the non-metallic interlayer dielectric material in a second region apart from the first region to a depth less than a total thickness of the non-metallic interlayer dielectric material, wherein the etching a zero mark in the non-metallic interlayer dielectric material is performed prior to conformal deposition of any of a touch layer, a memory stack comprising a plurality of films, wherein at least one film of the plurality of films is a magnesium oxide containing film, or a hardmask;
• conformally depositing the touch layer over the non-metallic interlayer dielectric material and the metallic via in the first region and the second region;
• conformally depositing the memory stack over the touch layer in the first region and the second region;
• conformally depositing the hardmask over the memory stack in the first region and the second region;
• patterning at least the first region;
• sequentially etching the hardmask, the memory stack, and the touch layer after patterning the first region to expose the non-metallic interlayer dielectric material;
• depositing additional interlayer dielectric material and planarizing the additional interlayer dielectric material with the hardmask;
• etching at least a portion of the hardmask to form a recess;
• and
• depositing a top contact over the additional interlayer dielectric material and in the recess.