Semiconductor device and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJean-Pierre Colinge, Carlos H. Diaz
Life of this patent
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Abstract
A semiconductor device includes a fin structure disposed over a substrate, a gate structure and a source. The fin structure includes an upper layer being exposed from an isolation insulating layer. The gate structure disposed over part of the upper layer of the fin structure. The source includes the upper layer of the fin structure not covered by the gate structure. The upper layer of the fin structure of the source is covered by a crystal semiconductor layer. The crystal semiconductor layer is covered by a silicide layer formed by Si and a first metal element. The silicide layer is covered by a first metal layer. A second metal layer made of the first metal element is disposed between the first metal layer and the isolation insulating layer.
Claims20
A semiconductor device comprising:
- a fin structure disposed over a substrate, the fin structure including an upper layer being located above an upper surface of an isolation insulating layer;
- a gate structure disposed over part of the upper layer of the fin structure;
- and
- a source which includes the upper layer of the fin structure, is located above the upper surface of the isolation insulating layer and is not covered by the gate structure, wherein:
- the source of the upper layer of the fin structure, which is located above the upper surface of the isolation insulating layer, is covered by a crystal semiconductor layer,
- the crystal semiconductor layer is covered by a first silicide layer formed by Si and a first metal element and a second silicide layer formed by Si and a second metal element different from the first metal element, and
- the second silicide layer is in direct contact with a different portion of the crystal semiconductor layer than a portion of the crystal semiconductor layer with which the first silicide layer is in direct contact.
A semiconductor device comprising:
- a first fin structure and a second fin structure both disposed over a substrate, each of the first and second fin structures including an upper layer being located above an upper surface of an isolation insulating layer, wherein:
- each of the first and second fin structures includes a source region and a drain region, which are located above the upper surface of the isolation insulating layer,
- each of the source and the drain regions of the upper layer of each of the first and second fin structures, which is located above the upper surface of the isolation insulating layer, is covered by a crystal semiconductor layer,
- the crystal semiconductor layer is covered by a first silicide layer formed by Si and a first metal element and a second silicide layer formed by Si and a second metal element different from the first metal element, and
- the second silicide layer is in direct contact with a different portion of the crystal semiconductor layer than a portion of the crystal semiconductor layer with which the first silicide layer is in direct contact.
A semiconductor device comprising:
- a first fin structure, a second fin structure and a third fin structure, all disposed over a substrate, each of the first to third fin structures including an upper layer located above an upper surface of an isolation insulating layer, wherein:
- each of the first to third fin structures includes a source region and a drain region, which are located above the upper surface of the isolation insulating layer,
- each of the source and the drain regions of the upper layer, which is located above the upper surface of the isolation insulating layer, of each of the first to third fin structures is covered by a crystal semiconductor layer,
- the crystal semiconductor layer is covered by a silicide layer,
- the silicide layer is covered by a first metal layer made of a first metal element, and
- a second metal layer made of a second metal element different from the first metal element is disposed between the first metal layer and the isolation insulating layer and between the source regions of first and the second fin structures.
Dependencies are inferred from the claim text.