Litho-etch-litho-etch with self-aligned blocks

A method for fabricating a semiconductor device including self-aligned vias and self-aligned blocks, comprising:

• patterning a plurality of mandrels including a first set of mandrels and a second set of mandrels from mandrel material of a base structure;
• forming a plurality of mandrel cuts in the first set of mandrels using lithography, including performing a partial organic planarization layer (OPL) etch;
• surrounding the first set of mandrels and a second set of mandrels of the base structure with spacer material to form mandrel-spacer structures;
• forming a flowable material layer on exposed surfaces of the mandrel-spacer structures;
• and
• performing additional processing, including forming a plurality of dielectric trenches within the base structure based on patterns formed in the flowable material layer.

A method for fabricating a semiconductor device including self-aligned vias and self-aligned blocks, comprising:

• forming, on a hardmask layer of a base structure, a plurality of mandrels including a first set of mandrels and a second set of mandrels from mandrel material of a base structure, the base structure further including a substrate and at least one dielectric sublayer formed on the substrate;
• forming a plurality of mandrel cuts from the first set of mandrels using lithography, including performing a partial organic planarization layer (OPL) etch;
• surrounding the first set of mandrels and a second set of mandrels of the base structure with spacer material to form mandrel-spacer structures, including depositing the spacer material on the hardmask layer;
• forming a flowable material layer on exposed surfaces of the mandrel-spacer structures;
• performing additional processing, including:
• transferring non-mandrel shape patterns into the flowable material layer;
• forming non-mandrel cut patterns in the flowable material layer;
• etching back the spacer material to expose surfaces of the plurality of mandrels;
• selectively removing mandrel and non-mandrel materials including the plurality of mandrels and the flowable material layer to form a final pattern including remaining portions of the spacer material;
• etching the hardmask layer using the final pattern;
• removing the remaining portions of the spacer material;
• and
• forming a plurality of dielectric trenches within the base structure based on the patterns;
• and
• performing a metallization process, including removing the hardmask layer, forming conductive material and planarizing the conductive material.