Semiconductor memory device and operating method thereof

#The present disclosure generally relates to an electronic device, and more particularly, to a semiconductor memory device and an operating method thereof.

#Memory devices may be formed as two-dimensional structures in which strings are arranged parallel to a semiconductor substrate, or may be formed as three-dimensional structures in which strings are arranged perpendicular to a semiconductor substrate, Three-dimensional memory devices are semiconductor memory device devised to overcome the limit on a degree of integration for two-dimensional memory devices. Three-dimensional memory devices may include a plurality of memory cells vertically stacked on a semiconductor substrate.

#According to an embodiment of the present disclosure, a method of operating a semiconductor memory device includes dummy-programming selected memory cells representing all the memory cells to be programmed for a programming operation. The method also includes determining as a first group of memory cells those selected memory cells having threshold voltages less than or equal to a reference threshold voltage and determining as a second group of memory cells those selected memory cells having threshold voltages greater than the reference threshold voltage. The method further includes programming the selected memory cells by applying a first bit line voltage to the memory cells of the first group, applying a second bit line voltage different from the first bit line voltage to the memory cells of the second group, and applying a same program pulse to the memory cells of the first and second groups.

#Example embodiments are described hereinafter with reference to the accompanying drawings; however, they may be embodied in different forms and should not be construed as being limited to the descriptions set forth herein. Rather, these embodiments are provided to make the present disclosure clear and enabling to those skilled in the art.

#In the drawings, dimensions may be exaggerated for clarity of illustration. It will be understood that when an element is referred to as being “between” two elements, it can be the only element between the two elements, or one or more intervening elements may also be present. Like reference numerals refer to like elements throughout the drawings.

#FIG. 1 is a block diagram illustrating a semiconductor memory device, according to an embodiment of the present disclosure.

#In the present disclosure, advantages, features, and methods for achieving them will become more apparent after reading the following embodiments taken in conjunction with the drawings. The present disclosure may, however, be embodied in different forms and should not be construed as being limited to the embodiments set forth herein, Rather, these embodiments are provided to describe the present disclosure in detail to the extent that those skilled in the art to which the disclosure pertains may understand the technical concept of the present disclosure.

#In the specification, when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the another element or be indirectly connected or coupled to the another element with one or more intervening elements interposed therebetween. In addition, when an element is referred to as “including” a component, this indicates that the element may further include another component instead of excluding another component unless explicitly stated otherwise.

#Hereinafter, embodiments of the present disclosure are described in detail with reference to the accompanying drawings. The same reference numerals are used to designate the same elements as those shown in other drawings. In the following descriptions, only portions necessary for understanding operations according to the embodiments are described, and descriptions of the other portions may be omitted so as to not obscure important concepts of the embodiments.