US 11,238,945 B1 · Techniques for programming self-selecting memory

Abstract

Methods, systems, and devices that support techniques for programming self-selecting memory are described. Received data may include a first group of bits that each have a first logic value and a second group of bits that each have a second logic value. The first and second group of bits may be stored in a first set of memory cells and a second set of memory cells, respectively. A first programming operation for writing the second logic value to both the first and second set of memory cells and verifying whether the second logic value is written to each of the first set of memory cells, the second set of memory cells, or both may be performed. A second programming operation may write the first logic value to either the first set of memory cells or the second set of memory cells based on a result of the verification.

Claims25

Dependent claims

A method, comprising:

receiving data comprising a first set of bits and a second set of bits, wherein each bit of the first set of bits has a first logic value and corresponds to a first memory cell of a first set of memory cells and each bit of the second set of bits has a second logic value and corresponds to a second memory cell of a second set of memory cells;
performing a first programming operation for writing the second logic value to each memory cell of the first set of memory cells and the second set of memory cells;
determining whether one or more of the second set of memory cells stores the first logic value after performing the first programming operation;
and
performing a second programming operation for writing the first logic value to each memory cell of the first set of memory cells or to each memory cell of the second set of memory cells based at least in part on the determining.

2 more elements

An apparatus, comprising:

a memory array comprising a first set of memory cells and a second set of memory cells;
a controller coupled with the memory array and configured to:
receive data comprising a first set of bits and a second set of bits, wherein each bit of the first set of bits has a first logic value and corresponds to a first memory cell of the first set of memory cells and each bit of the second set of bits has a second logic value and corresponds to a second memory cell of the second set of memory cells;
perform a first programming operation for writing the second logic value to each memory cell of the first set of memory cells and the second set of memory cells;
determine whether one or more of the second set of memory cells stores the first logic value after performing the first programming operation;
and
perform a second programming operation for writing the first logic value to each memory cell of the first set of memory cells or to each memory cell of the second set of memory cells based at least in part on the determining.

4 more elements

A non-transitory computer-readable medium storing code comprising instructions, which when executed by a processor of an electronic device, cause the electronic device to:

receive data comprising a first set of bits and a second set of bits, wherein each bit of the first set of bits has a first logic value and corresponds to a first memory cell of a first set of memory cells and each bit of the second set of bits has a second logic value and corresponds to a second memory cell of a second set of memory cells;
perform a first programming operation for writing the second logic value to each memory cell of the first set of memory cells and the second set of memory cells;
determine whether one or more of the second set of memory cells stores the first logic value after performing the first programming operation;
and
perform a second programming operation for writing the first logic value to each memory cell of the first set of memory cells or to each memory cell of the second set of memory cells based at least in part on the determining.

2 more elements

Dependencies are inferred from the claim text.

Techniques for programming self-selecting memory

Life of this patent

Techniques for programming self-selecting memory

Life of this patent

Abstract

Claims25