Semiconductor device and operating method of semiconductor device

A method of operating a semiconductor device including memory blocks sharing a common source line, each of the memory blocks including memory strings coupled between the common source line and bit lines, each of the memory strings including a first group of source select transistors, a second group of source select transistors, and memory cells, wherein the first group is coupled between the common source line and the second group, the method comprising:

• applying a positive voltage to a first source select line coupled to a first group of memory strings included in an unselected memory block, among the memory blocks;
• floating the first source select line after the positive voltage is applied thereto;
• applying a voltage for turning off the second group to a second source select line coupled to a second group of memory cell strings included in the unselected memory block;
• applying a precharge voltage to the common source line;
• and
• applying a program voltage to a word line coupled to selected memory cells of memory strings included in a selected memory block, among the memory blocks.

A semiconductor device, comprising:

• a common source line;
• a first memory block including first memory strings coupled between the common source and first bit lines, each of the first memory strings including a first source select transistor, a second source select transistor and memory cells, wherein the first source select transistor is located closer to the common source line than the second source select transistor;
• a second memory block including second memory strings coupled between the common source and second bit lines, each of the second memory strings including a third source select transistor, a fourth source select transistor and memory cells, wherein the third source select transistor is located closer to the common source line than the fourth source select transistor;
• a peripheral circuit configured to perform a program operation on the first and second memory strings;
• and
• a control logic circuit controlling the peripheral circuit to apply a first voltage to a first source select line coupled to first source select transistors of the first memory strings when the second memory block is selected, float the first source select line after the first voltage is applied thereto, apply a second voltage having a lower voltage level than the first voltage to a second source select line coupled to second source select transistors of the first memory strings, apply a precharge voltage to the common source line, and apply a program voltage to a word line coupled to selected memory cells of the second memory strings.