Memory controller and operating method thereof
AssigneeSK hynix Inc.
InventorsYou Min Ji, Keun Woo Lee
Life of this patent
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AssigneeSK hynix Inc.
InventorsYou Min Ji, Keun Woo Lee
Estimating the term…
A memory controller having an improved operation speed controls a memory device including a plurality of memory blocks. The memory controller includes: a remaining count determiner configured to determine a remaining count that is a number of program and erase operations to be additionally performed in the memory device based on a program/erase count received from the memory device, a retention period calculator configured to determine a retention period based on a power-off time and a power-on time of the memory device and a read voltage determiner configured to generate a changed read voltage table based on a default read voltage table and a coefficient determined according to the remaining count, and determine a read voltage to be used in the memory device according to the retention period among read voltages included in the changed read voltage table.
A memory controller for controlling a memory device including a plurality of memory blocks, the memory controller comprising:
A method for operating a memory controller for controlling a memory device including a plurality of memory blocks, the method comprising:
Dependencies are inferred from the claim text.