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US 11,238,913 B2Granted
Cell-based reference voltage generation
AssigneeMicron Technology, Inc.
InventorsScott James Derner, Christopher John Kawamura
Life of this patent
Estimating the term…
Abstract
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A first ferroelectric memory cell may be initialized to a first state and a second ferroelectric memory cell may be initialized to a different state. Each state may have a corresponding digit line voltage. The digit lines of the first and second ferroelectric memory cells may be connected so that charge-sharing occurs between the two digit lines. The voltage resulting from the charge-sharing between the two digit lines may be used by other components as a reference voltage.
Claims17
A method, comprising:
- coupling a first capacitor of a memory device with a first voltage source via a first digit line, wherein a first portion of a reference voltage is stored on the first capacitor based at least in part on coupling the first capacitor the first voltage source, wherein coupling the first capacitor to the first voltage source is based at least in part on activating a first switching component to selectively couple the first capacitor to the first digit line and activating a second switching component to couple the first voltage source to the first digit line;
- coupling a second capacitor of the memory device with a second voltage source different than the first voltage source via a second digit line, wherein a second portion of the reference voltage is stored on the second capacitor based at least in part on coupling the second capacitor to the second voltage source;
- determining a first voltage of the first capacitor and a second voltage of the second capacitor based at least in part on coupling the first capacitor with the first voltage source and coupling the second capacitor with the second voltage source;
- sharing a charge between the first digit line and the second digit line based at least in part on the first digit line comprising the first voltage and the second digit line comprising the second voltage;
- and
- storing the reference voltage that is based at least in part on the charge shared between the first digit line and the second digit line.
3 more elements
A method, comprising:
- identifying a first portion of a reference voltage signal based at least in part on a first voltage of a first digit line, wherein the reference voltage signal is associated with performing a read operation associated with an array of memory cells;
- identifying a second portion of the reference voltage signal based at least in part on a second voltage of a second digit line;
- storing the first portion of the reference voltage signal on a first memory cell of the array of memory cells;
- coupling the first memory cell to a first voltage source, wherein storing the first portion of the reference voltage signal on the first memory cell is based at least in part on coupling the first memory cell to the first voltage source, wherein coupling the first memory cell to the first voltage source is based at least in part on activating a first switching component to selectively couple the first memory cell to the first digit line and activating a second switching component to couple the first voltage source to the first digit line;
- storing the second portion of the reference voltage signal on a second memory cell of the array of memory cells;
- coupling the second memory cell to a second voltage source different from the first voltage source, wherein storing the second portion of the reference voltage signal on the second memory cell is based at least in part on coupling the second memory cell to the second voltage source;
- and
- sharing a charge between the first digit line and the second digit line based at least in part on storing the second portion of the reference voltage signal on the second memory cell of the array of memory cells, wherein the charge is shared based at least in part on shorting the first digit line to the second digit line, and wherein the reference voltage signal is based at least in part on sharing the charge between the first digit line and the second digit line.
5 more elements
A method, comprising:
- identifying a first portion of a reference voltage signal based at least in part on a first voltage of a first digit line, wherein the reference voltage signal is associated with performing a read operation associated with an array of memory cells;
- identifying a second portion of the reference voltage signal based at least in part on a second voltage of a second digit line;
- storing the first portion of the reference voltage signal on a first memory cell of the array of memory cells;
- coupling the first memory cell to a first voltage source, wherein storing the first portion of the reference voltage signal on the first memory cell is based at least in part on coupling the first memory cell to the first voltage source;
- storing the second portion of the reference voltage signal on a second memory cell of the array of memory cells;
- coupling the second memory cell to a second voltage source different from the first voltage source, wherein storing the second portion of the reference voltage signal on the second memory cell is based at least in part on coupling the second memory cell to the second voltage source, wherein coupling the second memory cell to the second voltage source is based at least in part on activating a third switching component to couple the second memory cell to the second digit line and activating a fourth switching component to couple the second voltage source to the second digit line;
- and
- sharing a charge between the first digit line and the second digit line based at least in part on storing the second portion of the reference voltage signal on the second memory cell of the array of memory cells, wherein the charge is shared based at least in part on shorting the first digit line to the second digit line, and wherein the reference voltage signal is based at least in part on sharing the charge between the first digit line and the second digit line.
5 more elements
A method, comprising:
- applying a first voltage to a first digit line of an array of memory cells, wherein a first portion of a reference voltage is stored to a first memory cell based at least in part on applying the first voltage to the first digit line, wherein applying the first voltage to the first digit line of the array of memory cells is based at least in part on activating a first switching component to selectively couple the first memory cell to the first digit line and activating a second switching component to couple a first voltage source to the first digit line;
- applying a second voltage to a second digit line of the array of memory cells, wherein the second voltage is different from the first voltage, wherein a second portion of the reference voltage is stored to a second memory cell based at least in part on applying the second voltage to the second digit line;
- coupling the first digit line with the second digit line based at least in part on applying the first voltage and the second voltage;
- sharing a charge between the first digit line and the second digit line based at least in part on coupling the first digit line with the second digit line;
- and
- generating the reference voltage based at least in part on coupling the first digit line with the second digit line and sharing the charge between the first digit line and the second digit line.
3 more elements
Dependencies are inferred from the claim text.