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US 11,238,912 B1Granted
Magnetoresistive random-access memory
AssigneeUnited Microelectronics Corp.
InventorsYi-Ting Wu, Cheng-Tung Huang, Jen-Yu Wang, Yung-Ching Hsieh, Po-Chun Yang, Jian-Jhong Chen, Bo-Chang Li
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Abstract
In an MRAM, each unit cell includes two non-volatile storage units, three N-type transistors and three P-type transistors. Each N-type transistor is coupled in parallel with a corresponding P-type transistor for forming a transmission gate which provides bi-directional current, thereby preventing source degeneration.
Claims11
A magnetoresistive random-access memory (MRAM), comprising:
- a first bit line;
- a second bit line;
- and
- a first unit cell, comprising:
- a first non-volatile storage unit, comprising:
- a first end coupled to the first bit line;
- and
- a second end;
- a second non-volatile storage unit, comprising:
- a first end coupled to the second bit line;
- and
- a second end;
- a first N-type transistor, comprising:
- a first end coupled to the second end of the first non-volatile storage unit;
- a second end;
- and
- a control end;
- a second N-type transistor, comprising:
- a first end coupled to the second end of the second non-volatile storage unit;
- a second end;
- and
- a control end;
- a third N-type transistor, comprising:
- a first end coupled to the first end of the first N-type transistor;
- a second end coupled to the first end of the second N-type transistor;
- and
- a control end;
- a first P-type transistor, comprising:
- a first end coupled to the second end of the first N-type transistor;
- a second end coupled to the first end of the first N-type transistor;
- and
- a control end;
- a second P-type transistor, comprising:
- a first end coupled to the second end of the second N-type transistor;
- a second end coupled to the first end of the second N-type transistor;
- and
- a control end;
- and
- a third P-type transistor, comprising:
- a first end coupled to the second end of the third N-type transistor;
- a second end coupled to the first end of the third N-type transistor;
- and
- a control end.
40 more elements
A magnetoresistive random-access memory (MRAM), comprising:
- an N-type doping region formed in a substrate;
- a P-type doping region formed in the substrate;
- a poly-silicon layer formed on the substrate;
- a first metal layer formed on the substrate;
- a second metal layer formed above the first metal layer;
- a first non-volatile storage unit disposed above the second metal layer and located on a first reference line;
- a second non-volatile storage unit disposed above the second metal layer and located on a second reference line parallel to the first reference line;
- a third metal layer formed above the first non-volatile storage unit and the second non-volatile storage unit;
- and
- a fourth metal layer formed above the third metal layer.
7 more elements
Dependencies are inferred from the claim text.