Edge test and depth calculation in graphics processing hardware

A method of calculating an edge test output value or a depth calculation value in a graphics processing system arranged to render a scene in a rendering space, wherein the rendering space is sub-divided into a plurality of tiles, and each tile is sub-divided into a plurality of microtiles, each microtile comprising at least one pixel, the method comprising:

• in a first hardware element, calculating a first output based on coordinates of a microtile within a tile;
• in each of a plurality of second hardware elements, calculating a second output based on coordinates of a pixel within a microtile;
• and
• generating an edge test output value or a depth calculation value based on at least one of the second outputs.

A non-transitory computer readable storage medium having stored thereon a computer readable dataset description of an integrated circuit that, when processed in an integrated circuit manufacturing system, causes the integrated circuit manufacturing system to manufacture a graphics processing system arranged to render a scene in a rendering space, wherein the rendering space is sub-divided into a plurality of tiles, and each tile is sub-divided into a plurality of microtiles, each microtile comprising at least one pixel, the graphics processing system comprising:

• a first hardware element configured to calculate a first output based on coordinates of a microtile within a tile;
• a plurality of second hardware elements, each configured to calculate respective second output based on coordinates for a pixel within the microtile;
• and
• hardware logic configured to generate an edge test output value or depth calculation value based on at least one of the second outputs, wherein the scene is rendered in said rendering space using the generated edge test output values or depth calculation values.