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US 11,237,984 B2Granted
Memory system, memory controller and operating method thereof
AssigneeSK hynix Inc.
InventorEu-Joon Byun
Life of this patent
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Abstract
Embodiments of the present invention relate to a memory system, a memory device, a memory controller and an operating method thereof. A partial mapping table including some of plural pieces of mapping information between physical addresses and logical addresses, which are included in a mapping table stored in the memory device, is cached, a piece of mapping information corresponding to data indicated by a command is referred to in the partial mapping table, and whether to perform an update for a reference-related parameter of the piece of mapping information is controlled depending on a size of the data, thereby improving cache efficiency for mapping informations for processing a request from a host and through this, increasing the success rate of a cache hit.
Claims12
A memory system comprising:
- a memory device configured to store a mapping table having plural pieces of mapping information mapping between physical addresses and logical addresses;
- and
- a memory controller configured to cache a partial mapping table including some of the plural pieces of mapping information included in the mapping table,
- wherein the memory controller refers to a first piece of mapping information corresponding to first data indicated by a first command, in the partial mapping table, and performs an update for a reference-related parameter of the first piece of mapping information, and
- wherein the memory controller refers to a second piece of mapping information corresponding to second data indicated by a second command, in the partial mapping table, and size of the second data is a second size, which is different from a first size of the first data and does not perform an update for a reference-related parameter of the second piece of mapping information,
- wherein the first size is smaller than the second size,
- wherein the first size is equal to or smaller than a threshold value and the second size exceeds the threshold value,
- wherein the memory controller refers to a third piece of mapping information corresponding to third data indicated by a third command and size of the third data is a third size, which is larger than the second size, in the partial mapping table, and does not perform an update for a reference-related parameter of the third piece of mapping information,
- wherein the first size is smaller than a first threshold value, the second size is equal to or larger than the first threshold value and is smaller than a second threshold value, and the third size is equal to or larger than the second threshold value,
- wherein the update of the reference-related parameter of the third piece of mapping information and the update of the reference-related parameter of the second piece of mapping information are not performed at different frequency, and
- wherein a frequency that the reference-related parameter of the third piece of mapping information, corresponding to the third data having the third size, is not updated is higher than a frequency that the reference-related parameter of the second piece of mapping information, corresponding to the second data having the second size, is not updated.
8 more elements
A memory controller comprising:
- a host interface for communicating with a host;
- a memory interface configured to communicate with a memory device which stores a mapping table having plural pieces of mapping information mapping between physical addresses and logical addresses;
- a cache memory configured to cache a partial mapping table including some of the plural pieces of mapping information included in the mapping table;
- and
- a control circuit configured to control the memory device,
- wherein the control circuit refers to a first piece of mapping information corresponding to first data indicated by a first command, in the partial mapping table, and performs an update for a reference-related parameter of the first piece of mapping information, and
- wherein the control circuit refers to a second piece of mapping information corresponding to second data indicated by a second command, in the partial mapping table, and size of the second data is a second size, which is different from a first size of the first data and does not perform an update for a reference-related parameter of the second piece of mapping information,
- wherein the first size is smaller than the second size,
- wherein the first size is equal to or smaller than a threshold value and the second size exceeds the threshold value,
- wherein the control circuit refers to a third piece of mapping information corresponding to third data indicated by a third command and size of the third data is a third size, which is larger than the second size, in the partial mapping table, and does not perform an update for a reference-related parameter of the third piece of mapping information, and
- wherein, when the first size is smaller than a first threshold value, the second size is equal to or larger than the first threshold value and is smaller than a second threshold value and the third size is equal to or larger than the second threshold value,
- wherein the update of the reference-related parameter of the third piece of mapping information and the update of the reference-related parameter of the second piece of mapping information are not performed at different frequency, and
- wherein a frequency that the reference-related parameter of the third piece of mapping information, corresponding to the third data having the third size, is not updated is higher than an frequency that the reference-related parameter of the second piece of mapping information corresponding to the second data having the second size, is not updated.
10 more elements
A method of operating a memory controller for controlling a memory device, comprising:
- caching a partial mapping table including some of plural pieces of mapping information mapping between physical addresses and logical addresses, which are included in a mapping table in the memory device;
- referring to mapping information corresponding to data indicated by a command, in the partial mapping table;
- and
- controlling an update for a reference-related parameter of the mapping information to be performed or not to be performed, depending on a size of the data,
- wherein, in the controlling, the memory controller performs the update for the reference-related parameter of the mapping information when the size of the data is equal to or smaller than a first threshold value, and does not perform the update for the reference-related parameter of the mapping information when the size of the data is larger than the first threshold value,
- wherein the memory controller refers to a third piece of mapping information corresponding to third data indicated by a third command and size of the third data is a third size, which is larger than the second size, in the partial mapping table, and does not perform an update for a reference-related parameter of the third piece of mapping information, and
- wherein the first size is smaller than a first threshold value, the second size is equal to or larger than the first threshold value and is smaller than a second threshold value, and the third size is equal to or larger than the second threshold value,
- wherein the update of the reference-related parameter of the third piece of mapping information and the update of the reference-related parameter of the second piece of mapping information are not performed at different frequency, and
- wherein a frequency that the reference-related parameter of the third piece of mapping information, corresponding to the third data having the third size, is not updated is higher than a frequency that the reference-related parameter of the second piece of mapping information, corresponding to the second data having the second size, is not updated.
6 more elements
Dependencies are inferred from the claim text.