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US 11,237,983 B2Granted
Memory device, method of operating memory device, and computer system including memory device
AssigneeSamsung Electronics Co., Ltd.
InventorsTaehyo Kim, Daeseok Byeon, Taehong Kwon, Chanho Kim, Taeyun Lee
Life of this patent
Estimating the term…
Abstract
A memory device includes; a memory area including a first memory area including first memory cells storing N-bit data and a second memory area including second memory cells storing M-bit data, where ‘M’ and ‘N’ are natural numbers and M is greater than N, and a controller configured to read data stored in the first memory area using a first read operation, read data stored in the second memory area using a second read operation different from the first read operation, and selectively store data in one of the first memory area and the second memory area based on a frequency of use (FOU) of the data.
Claims17
A memory device comprising:
- a memory area including a first memory area including first memory cells storing N-bit data and a second memory area including second memory cells storing M-bit data, where ‘M’ and ‘N’ are natural numbers and M is greater than N;
- and
- a controller configured to read data stored in the first memory area using a first read operation, read data stored in the second memory area using a second read operation different from the first read operation, and selectively store first data in one of the first memory area and the second memory area based on a frequency of use (FOU) of the first data,
- the FOU of the first data stored in the first memory area is greater than the FOU of the first data stored in the second memory area,
- wherein the controller is further configured to compare the FOU of the first data with a first FOU reference value and a second FOU reference value less than the first FOU reference value,
- to store the first data in the first memory area upon determining that the FOU of the first data is greater than the first FOU reference value, and to store the first data in the second memory area upon determining that the FOU of the first data is less than or equal to the first FOU reference value and greater than the second FOU reference value, and
- to store the data in a memory area other than the first memory area and the second memory area, upon determining that the FOU of the first data is less than or equal to the second FOU reference value.
4 more elements
A memory device comprising:
- a memory area including a first memory area including first memory cells, another memory area including memory cells, and a security area;
- and
- a controller configured to
- read data stored in the first memory area using a first read operation,
- read data stored in the another memory area using a second read operation different from the first read operation,
- selectively store first data in one of the first memory area and the another memory area based on a frequency of use (FOU) of the first data and an importance weighting of the first data, and
- store second data having a FOU lower than a predetermined reference value and a weight higher than a predetermined threshold value in the security area,
- wherein each of the first memory cells stores 1-bit data, and each of the memory cells stores data of 2 or more bits.
5 more elements
A computer system comprising:
- a processor configured to control execution of a first operation at a first speed, control execution of a second operation at a second speed different from the first speed, and provide data to a memory device,
- wherein the memory device comprises
- a memory area including a first memory area including memory cells operated as single level memory cells (SLC), and a second memory area including memory cells operated as at least one of multi level memory cells (MLC), triple level memory cells (TLC) and quad level memory cells (QLC);
- and
- a controller configured to
- read data stored in the first memory area using a first read operation in response to execution of the first operation,
- read data stored in the second memory area using a second read operation different from the first read operation in response to execution of the second operation, and
- store the data provided by the processor in the first memory area when a frequency of use (FOU) of the data is greater than a first FOU reference value, and store the data provided by the processor in the second memory area when the FOU of the data is less than or equal to the first FOU reference value and greater than a second FOU reference value,
- wherein the controller stores the data in a memory area other than the first memory area and the second memory area, when the FOU of the data is less than or equal to the second FOU reference value.
6 more elements
Dependencies are inferred from the claim text.