Memory system, memory controller and meta-information storage device
AssigneeSK hynix Inc.
InventorsHye-Mi Kang, Eu-Joon Byun
Life of this patent
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Abstract
Embodiments of the disclosure relate to a memory system, a memory controller and a meta-information storage device. By providing a memory device configured to store mapping information between a logical address and a physical address, a memory controller configured to control the memory device and control a memory area in which mapping segments including some of the mapping information are stored and a meta-information storage device configured to store meta-information on the memory area, it is possible to provide a memory system, a memory controller and a meta-information storage device capable of processing a command received from a host as quickly as possible even when an SPO occurs.
Claims20
A memory system comprising:
- a memory device configured to store data at a physical address corresponding to a logical address of a host, and store mapping information between the logical address and the physical address;
- a memory controller configured to control the memory device and a memory area of the host in which mapping segments including some of the mapping information are stored and which is disposed externally to the memory system;
- and
- a meta-information storage device, including a nonvolatile memory capable of reading and writing in a byte unit, configured to store meta-information on the mapping segments stored in the memory area,
- wherein the memory controller controls synchronization between the mapping segments stored in the memory area and the mapping information when an SPO (sudden power-off) occurs in the memory system, and
- wherein the memory controller determines whether to activate the memory area so that the host refers to the mapping information stored in the memory area.
A memory controller comprising:
- a memory interface configured to communicate with a memory device which stores data at a physical address corresponding to a logical address of a host and stores mapping information between the logical address and the physical address;
- and
- a control circuit configured to control the memory device and a memory area of the host in which mapping segments including some of the mapping information are stored and which is disposed externally to a memory system that includes the control circuit and the memory device,
- wherein the control circuit controls synchronization between the mapping segments stored in the memory area and the mapping information when an SPO (sudden power-off) occurs in the memory system, and controls meta-information on the mapping segments, to be stored in a meta-information storage device comprising a nonvolatile memory capable of reading and writing in a byte unit, and
- wherein the control circuit determines whether to activate the memory area so that the host refers to the mapping information stored in the memory area.
A meta-information storage device suitable for storing meta-information on a memory area of a host, the meta-information storage device comprising:
- a nonvolatile memory capable of reading and writing in a byte unit, used to minimize the possibility of an SPO (Sudden Power-Off) to occur while the meta-information is storing in the meta-information storage device,
- wherein the memory area is disposed externally to a memory system which includes the meta-information storage device, and stores mapping segments including some of mapping information between a logical address of the host and a physical address corresponding to the logical address, and
- wherein the memory area is activated by the memory system so that the host refers to the mapping information stored in the memory area.
Dependencies are inferred from the claim text.