Processing-in-memory instruction set with homomorphic error correction
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorKatherine H Chiang
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Abstract
A method includes transmitting an ECC encoded first data and an ECC encoded second data from a memory to a logic circuit, and generating an ECC encoded output data by executing an ECC-Space operation using the ECC encoded first data as a first operand and the ECC encoded second data as a second operand. The ECC encoded first data and the ECC encoded second data are the corresponding results of encoding a first data and a second data with an ECC algorithm. The ECC-Space operation is translated from a two operands operation that is operative to transform the first data and the second data into a third data. The ECC encoded output data is identical to a result of encoding the third data with the ECC algorithm if the third data is encoded with the ECC algorithm.
Claims20
A method comprising:
- transmitting an ECC encoded first data and an ECC encoded second data from a memory to a logic circuit, wherein the ECC encoded first data is identical to a result of encoding a first data with an ECC algorithm and the ECC encoded second data is identical to a result of encoding a second data with the ECC algorithm;
- generating an ECC encoded output data by executing an ECC-Space operation using the ECC encoded first data as a first operand and the ECC encoded second data as a second operand, wherein the ECC-Space operation is translated from a two operands operation of a first processor and the two operands operation is operative to transform the first data and the second data into a third data;
- and
- wherein the ECC encoded output data is identical to a result of encoding the third data with the ECC algorithm if the third data is encoded with the ECC algorithm.
A method of processing data in a memory device that supports processing-in-memory (PIM) operations, the method comprising:
- determining a category of an instruction received by a first processor;
- and
- processing one or more category-dependent operations based on the category determined, wherein the processing one or more category-dependent operations comprise:
- if the category of the instruction received is a category of memory PIM compatible instructions, selecting an ECC-Space operation corresponding to the instruction received and executing the ECC-Space operation in a logic circuit in the memory device, and
- if the category of the instruction received is a category of PIM-unassigned native instructions of the first processor, executing the instruction in the first processor.
A device comprising:
- a memory operative to store an ECC encoded first data and an ECC encoded second data, wherein the ECC encoded first data is identical to a result of encoding a first data with an ECC algorithm and the ECC encoded second data is identical to a result of encoding a second data with the ECC algorithm;
- a logic circuit in the memory configured to execute an ECC-Space operation operative to generate an ECC encoded output data from the ECC encoded first data and the ECC encoded second data;
- wherein the ECC-Space operation is translated from a two operands operation that is operative to transform the first data and the second data into a third data;
- and
- if the ECC encoded output data is decoded with the ECC algorithm, a result of decoding the ECC encoded output data with the ECC algorithm is identical to the third data.
Dependencies are inferred from the claim text.