Technologies for providing ECC pre-provisioning and handling for cross-point memory and compute operations

A method comprising:

• receiving, by a media access circuitry coupled to a memory media having a plurality of memory partitions, a request to perform a first in-memory compute operation on data from the memory media, the first in-memory compute operation on the data to include a first matrix calculation, the request specifying a first memory partition of the plurality of memory partitions of the memory media associated with the data for which the first in-memory compute operation is to be performed on by the media access circuitry;
• reading, by the media access circuitry, the data from the first memory partition;
• performing, by the media access circuitry, error correction on the read data to produce error-corrected read data;
• and
• storing, by the media access circuitry, the error-corrected read data in a temporary buffer for use to perform a second in-memory compute operation by the media access circuitry, the second in-memory compute operation on the error-corrected read data to include a second matrix calculation.

One or more machine-readable storage media comprising a plurality of instructions stored thereon that, in response to being executed, cause media access circuitry coupled to a memory media having a plurality of memory partitions included in a memory to:

• receive a request to perform a first in-memory compute operation on data from the memory media, the first in-memory compute operation on the data to include a first matrix calculation, the request specifying a first memory partition of the plurality of memory partitions of the memory media associated with the data for which the first in-memory compute operation is to be performed on by the media access circuitry;
• read the data from the first memory partition;
• perform error correction on the read data to produce error-corrected read data;
• and
• store the error-corrected read data in a temporary buffer for use to perform a second in-memory compute operation by the media access circuitry, the second in-memory compute operation on the error-corrected read data to include a second matrix calculation.