Handling asynchronous memory errors on kernel text

A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising:

• identifying a correctable error (CE) at an error memory location in a memory;
• identifying a kernel function impacted by the CE, the kernel function comprising a plurality of instructions in a first region of the memory, the plurality of instructions comprising a first instruction of the kernel function at a first physical location, the first region including the error memory location;
• determining that the error memory location is not the same memory location as the first physical location;
• loading the plurality of instructions to a second region of the memory in response to determining that the error memory location is not the same memory location as the first physical location, the loading including storing the first instruction at a second physical location in the second region;
• and
• updating the first physical location to include an instruction to branch to the second physical location.

A system comprising:

• a memory;
• and
• a processor communicatively coupled to the memory, wherein the processor is configured to perform a method comprising:
• identifying a correctable error (CE) at an error memory location in the memory;
• identifying a kernel function impacted by the CE, the kernel function comprising a plurality of instructions in a first region of the memory, the plurality of instructions comprising a first instruction of the kernel function at a first physical location, the first region including the error memory location;
• determining that the error memory location is not the same memory location as the first physical location;
• loading the plurality of instructions to a second region of the memory in response to determining that the error memory location is not the same memory location as the first physical location, the loading including storing the first instruction at a second physical location in the second region;
• and
• updating the first physical location to include an instruction to branch to the second physical location.