Multiply-accumulate instruction processing method and apparatus

An instruction processing method, comprising:

• receiving and decoding a multiply-accumulate instruction, the multiply-accumulate instruction indicating that a first register is a first operand, a second register is a second operand, a third register is a third operand, and a shift flag;
• executing the decoded multiply-accumulate instruction so as to acquire first source data from the first register and acquire second source data from the second register;
• performing a multiplication operation on the first source data and the second source data so as to obtain a multiplication result from a multiplier;
• shifting the multiplication result, obtained from the multiplier, according to the shift flag and sending the shifted multiplication result to an adder;
• and
• adding the shifted multiplication result and accumulated data in the third register, by the adder, so as to obtain a multiply-accumulate result.

A computing system, comprising:

• a memory;
• and
• a processor, coupled to the memory, and comprising:
• a register set, comprising a first register adapted to store first source data, a second register adapted to store second source data, and a third register adapted to store accumulated data;
• a decoder, configured to receive and decode a multiply-accumulate instruction, the multiply-accumulate instruction indicating that:
• the first register is a first operand, the second register is a second operand, the third register is a third operand, and a shift flag;
• and
• an execution unit, coupled to the first register, the second register, the third register, and the decoder, and configured to:
• execute the decoded multiply-accumulate instruction so as to acquire the first source data from the first register and acquire the second source data from the second register;
• perform a multiplication operation on the first source data and the second source data so as to obtain a multiplication result,
• wherein the multiplication operation is performed by a multiplier of the execution unit;
• and
• shift the multiplication result, obtained from the multiplier, according to the shift flag and send the shifted multiplication result to an adder, wherein the adder adds the shifted multiplication result and the accumulated data in the third register so as to obtain a multiply-accumulate result.