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US 11,237,808 B2Granted
Target architecture determination
AssigneeMicron Technology, Inc.
InventorJohn D. Leidel
Life of this patent
Estimating the term…
Abstract
Examples of the present disclosure provide apparatuses and methods for target architecture determination. An example method comprises receiving an indication of a type of target architecture in a portion of source code and creating compiled code for the type of target architecture based on the indication.
Claims18
An apparatus, comprising:
- a processor;
- and
- a compiler that includes:
- a parser, wherein the parser is configured to separate a source code from other portions of source code based on a named address space defined in the source code;
- a target identifier, wherein the target identifier is configured to determine a type of target architecture based on the named address space defined in the source code;
- and
- a code generator, wherein the code generator is configured to create a first portion of compiled code that includes heterogeneous instructions for the type of target architecture and a second portion of compiled code that includes instructions for a base processor.
4 more elements
A method, comprising:
- creating a first portion of compiled code that includes instructions for a target architecture, wherein the first portion of compiled code includes a number of heterogeneous instructions for the target architecture, wherein creating the first portion of compiled code includes separating a source code from other portions of source code based on a named address space defined in the source code, and wherein creating the first portion of compiled code includes determining a type of target architecture based on the named address space defined in the source code;
- and
- creating a second portion of compiled code that includes instructions for a base processor, wherein the second portion of compiled code includes a number of homogeneous instructions and a number of heterogeneous instructions for the base processor.
An apparatus comprising:
- a processor;
- and
- a compiler that includes:
- a parser, wherein the parser is configured to separate a source code from other portions of source code based on a named address space defined in the source code and to group portions of the source code together based on type of target architecture;
- a target identifier, wherein the target identifier is configured to determine a target architecture based on the named address space of the source code;
- and
- a code generator, wherein the code generator is configured to create a first portion
- of compiled code from the source code that includes instructions for the target architecture and wherein the target architecture is configured to execute the first portion of compiled code.
5 more elements
Dependencies are inferred from the claim text.