Memory system
AssigneeToshiba Memory Corporation
InventorYoshitaka Ikeda
Life of this patent
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Abstract
A memory system includes a nonvolatile memory and a controller configured to control the nonvolatile memory. The controller includes a processor, a storage circuit including a plurality of rewritable storage circuits that store timing data of a first timing information group which is settable by the processor, and a power source control circuit configured to trigger parallel execution of a plurality of power source control functions according to the timing data of the first timing information group read from the storage circuit.
Claims17
A memory system comprising:
- a nonvolatile memory;
- and
- a controller configured to control the nonvolatile memory, wherein the controller includes:
- a storage circuit including a plurality of rewritable storage circuits;
- a processor configured to store timing data in each of the plurality of rewritable storage circuits;
- a plurality of power source circuits;
- and
- a power source control circuit configured to:
- obtain the timing data from each of the plurality of rewritable storage circuits;
- decode the timing data obtained from each of the plurality of rewritable storage circuits to generate a plurality of power source control signals;
- and
- trigger parallel execution of a plurality of power source control functions by the plurality of power source circuits, respectively, according to the plurality of power source control signals.
A method of executing power source control functions of a memory system, wherein the memory system includes a nonvolatile memory and a controller for the nonvolatile memory, the controller including a plurality of power source circuits, said method comprising:
- storing timing data which is settable by the controller in a plurality of rewritable storage circuits;
- and
- reading the timing data from one of the rewritable storage circuits, decoding the timing data to generate a plurality of power source control signals, and executing a plurality of power source control functions in parallel by the plurality of power source circuits, respectively, according to the plurality of power source control signals.
Dependencies are inferred from the claim text.