SLC cache management
AssigneeMicron Technology, Inc.
InventorsKulachet Tanpairoj, Sebastien Andre Jean, Kishore Kumar Muchherla, Ashutosh Malshe, Jianmin Huang
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorsKulachet Tanpairoj, Sebastien Andre Jean, Kishore Kumar Muchherla, Ashutosh Malshe, Jianmin Huang
Estimating the term…
Disclosed in some examples are memory devices which feature customizable Single Level Cell (SLC) and Multiple Level Cell (MLC) configurations. The SLC memory cells serve as a high-speed cache providing SLC level performance with the storage capacity of a memory device with MLC memory cells. The proportion of cells configured as MLC vs the proportion that are configured as SLC storage may be configurable, and in some examples, the proportion may change during usage based upon configurable rules based upon memory device metrics. In some examples, when the device activity is below an activity threshold, the memory device may skip the SLC cache and place the data directly into the MLC storage to reduce power consumption.
A memory device comprising:
A method performed by a memory controller, the method comprising:
A non-transitory machine-readable medium, storing instructions, which when executed by the machine, cause the machine to perform operations comprising:
Dependencies are inferred from the claim text.