Microchip having a plurality of reconfigurable test structures
AssigneeHochschule Hamm-Lippstadt
InventorRene Krenz-Baath
Life of this patent
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Abstract
The invention relates to a microchip with a multiplicity of reconfigurable test structures, wherein the microchip has a test input (TDI) and a test output (TDO), wherein the multiplicity of test structures can be connected to the test input (TDI) and the test output (TDO), wherein one intermediate memory is provided for each of the multiplicity of test structures, wherein each of the multiplicity of test structures can be tested separately and concurrently with the aid of the respective intermediate memory and a corresponding individual control.
Claims7
A microchip comprising a multiplicity of reconfigurable test structures, wherein:
- the microchip has a test input (TDI) and a test output (TDO);
- each reconfigurable test structure of the multiplicity of reconfigurable test structures is connected to the test input (TDI) and to the test output (TDO);
- the microchip comprises a plurality of intermediate blocks including a respective intermediate block provided for each of the reconfigurable test structures;
- each of the intermediate blocks comprises at least a memory and a control;
- each of the memories of the intermediate blocks is configured to store a respective test stimulus for the respective reconfigurable test structure;
- each of the controls of the intermediate blocks is configured to execute the respective test stimulus for the respective reconfigurable test structure;
- and each of the multiplicity of reconfigurable test structures is configured to be tested separately and concurrently with the aid of the respective intermediate block.
Dependencies are inferred from the claim text.