US 11,237,208 B2 · Apparatus and method for testing semiconductor devices

Abstract

The invention is a test system for testing silicon wafers or packaged devices. The system includes a tester having multiple testing stacks that each hold a vertical stack of test engines, data buffers, pin drivers, and other resources, which are electrically connected on one side to a wafer or DUT and on the other side to a test host computer via fast data links. Each testing stack is disposed on a top side of a wafer contactor electrically connected to a wafer or a load board electrically connected to a DUT. The system includes a cooling system to remove heat during operation. The system minimizes the data signal path between the pads of the devices being tested and the pin drivers of the tester, the test engines, and the test host computer. High performance is possible by the connection of bottom of each testing stack directly to the wafer contactor.

Claims16

Dependent claims

A device for testing a silicon wafer, comprising:

a plurality of vertical stacks of test boards, wherein each of said test boards are electrically connected to a host computer;
a corresponding plurality of electrical connectors, each electrically connected to each of said test boards in a corresponding one of said vertical stacks of test boards and disposed at the bottom of said corresponding one of said vertical stacks of test boards;
a flat connector having a top side and a bottom side, wherein each of said vertical stacks of test boards and said corresponding electrical connectors is disposed on said top side of said flat connector, wherein said flat connector comprises a plurality of electrical traces for electrical connection to a silicon wafer under test, wherein each one of said electrical traces is between one of said corresponding of electrical connectors through said flat connector to a location on said bottom side of said flat connector that is directly below said one of said corresponding electrical connectors and said corresponding vertical stack of test boards.

A device for testing a silicon wafer, comprising:

a housing configured to hold a vertical stack of test boards for testing a silicon wafer;
a flexible electrical circuit board having at least one side portion extending vertically along a side of said vertical stack and electrically connected to each of said test boards, wherein said flexible electrical circuit board comprises a bottom portion disposed on a bottom of said vertical stack;
an electrical connector having a top side attached to a bottom side of said bottom portion of said electrical circuit board and a bottom side;
and
a wafer contactor having a top side and a bottom side, wherein said housing and said electrical connector are disposed on said top side of said wafer contactor and wherein said bottom side of said wafer contactor is configured to mate with the silicon wafer;
wherein said electrical connector is configured to pass electrical signals to and from said test boards and said wafer contactor and wherein said wafer contactor provides an electrical connection between said bottom side of said electrical connector to a location on the bottom side of said wafer contactor that is directly under said vertical stack of test boards for testing a die on the silicon wafer that, during use, is positioned directly under said location on the bottom side of said wafer contactor.

3 more elements

Dependencies are inferred from the claim text.

Apparatus and method for testing semiconductor devices

Life of this patent

Apparatus and method for testing semiconductor devices

Life of this patent

Abstract

Claims16