Memory device with a repair match mechanism and methods for operating the same
AssigneeMicron Technology, Inc.
InventorChristopher G. Wieduwilt
Life of this patent
Estimating the term…
Abstract
Methods, apparatuses and systems related to managing access to a memory device are described. A memory device includes fuses and latches for storing a repair address and a plane locator. A match circuit generates a repair enable flag based on the plane locator, wherein the repair status represents enable, disable, and/or unused setting for the repair address with respect to implementing a global replace for the repair address with redundant cells on a repair plane.
Claims23
An apparatus, comprising:
- a memory array having a plurality of memory cells arranged according to rows and columns, the memory array including:
- a plurality of memory planes corresponding to column planes, and
- one or more repair planes, each repair plane having a plurality of redundant cells configured to replace a set of defective memory cells in one of the memory planes;
- a set of address latches configured to latch a repair address corresponding to the set of defective memory cells;
- a set of locator latches configured to latch a plane locator identifying the one of the memory planes targeted for a global repair;
- and
- a match circuit coupled to the set of address latches and to the set of locator latches, the match circuit configured to—
- generate an address comparison result based on comparing the repair address to an address for an operation;
- and
- generate a repair enable flag based on the plane locator, wherein the repair status represents enable, disable, and/or unused setting for the global repair;
- wherein the address comparison result and the repair enable flag indicate whether or not to access redundant cells in one of the repair planes instead of memory cells indicated by the address for the operation.
A method of operating a memory device that includes a plurality of memory cells arranged according to rows and columns and a plurality of redundant cells configured to replace one or more defective memory cells in the plurality of memory cells, the method comprising:
- obtaining a repair address representing a location of the one or more defective memory cells;
- obtaining a plane locator representing a column plane within the memory array that includes the one or more defective memory cells, wherein the plurality of memory cells are grouped into column planes and the redundant cells are grouped into one or more repair planes;
- determining an enable status for the repair address based on the plane locator, wherein determining the enable status includes activating a repair enable flag when one or more predetermined bits of the plane locator do not indicate an unused status nor a disabled status;
- and
- implementing a global repair according to the enable status, wherein implementing the global repair includes globally replacing the one or more defective memory cells when the repair enable flag is activated.
A method of manufacturing a memory device, the method comprising:
- providing a memory array having a plurality of memory cells arranged in rows and columns, the memory array including (1) memory planes corresponding to column planes and (2) one or more repair planes that each include a plurality of redundant cells configured to replace a set of defective memory cells in the plurality of memory cells;
- providing latches including a set of address latches and a set of locator latches for each repair, wherein—
- the set of address latches are configured to store a repair address representing a location of the set of defective memory cells within the segment,
- the set of locator latches configured to store a plane locator representing a plane targeted for a global replace;
- and
- connect a match circuit to the latches, wherein the match circuit is configured to—
- determine whether the repair address matches an address for an operation, and
- generate a repair enable flag based on the plane locator, wherein the repair status represents enable, disable, and/or unused setting for the global replace.
Dependencies are inferred from the claim text.