Semiconductor device including page buffer

A semiconductor device comprising:

• a plurality of groups of bit lines, each group having a pair of first group bit lines and a pair of second group bit lines that are arranged in a first direction;
• and
• a plurality of page buffers coupled to the plurality of groups of bit lines and a plurality of connection lines corresponding to the plurality of groups of bit lines,
• wherein the pair of first group bit lines includes a first odd bit line and a first even bit line,
• wherein the pair of second group bit lines includes a second odd bit line and a second even bit line,
• wherein the plurality of connection lines includes odd connection lines and even connection lines,
• wherein the odd connection lines corresponding to first odd bit lines of a group of bit lines and second odd bit lines of an adjacent group of bit lines are grouped and arranged in an array pattern in the first direction, and the even connection lines corresponding to first even bit lines of a group of bit lines and second even bit lines of an adjacent group of bit lines are grouped and arranged in an array pattern in the first direction, and
• wherein the plurality of page buffers includes:
• a plurality of odd page buffers coupled to odd connection lines of the first group bit lines and the second group bit lines, and the odd page buffers are arranged contiguous to each other in the first direction;
• and
• a plurality of even page buffers coupled to even connection lines of the first group bit lines and the second group bit lines, and the even page buffers are arranged contiguous to each other in the first direction,
• wherein the plurality of page buffers selectively discharge voltage of odd connection lines and even connection lines, and provide test voltage for a test operation to the plurality of bit lines.