Memory system performing reference voltage training operation and operating method of memory system

An operating method of a memory system including a memory device and a memory controller, the operating method comprising:

• generating, by a code signal generator included in the memory controller, first code signals;
• selecting, by a comparison voltage selector included in the memory controller, reference voltage candidates in an order of a voltage level as a comparison voltage;
• generating, by a delay component included in the memory controller, second code signals by delaying the first code signals from the code signal generator;
• selecting, by a reference voltage candidate selector included in the memory controller, the reference voltage candidates in the order of a voltage level as a reference voltage candidate;
• and
• generating, by a detector included in the memory controller, a flag signal by comparing the comparison voltage and the reference voltage candidate which are alternately provided,
• wherein each one of the first code signals from the code signal generator is provided to both the comparison voltage selector and the delay component,
• wherein the detector comprises a mismatch operational amplifier (OP Amp) including a first input transistor receiving the comparison voltage, a second input transistor receiving the reference voltage candidate, and a weighted input transistor receiving the reference voltage candidate and coupled in parallel to the second input transistor, and
• wherein the detector generates the flag signal having a first logic level when the comparison voltage equals to the reference voltage candidate and generates the flag signal having a second logic level when the comparison voltage does not equal to the reference voltage candidate.