Semiconductor device and data driver

A semiconductor device comprising:

• an input terminal configured to receive an input signal;
• an output terminal configured to output an output signal;
• first and second power supply terminals configured to receive a first power supply potential and a second power supply potential different from the first power supply potential, respectively;
• a differential stage configured to generate a first differential signal and a second differential signal, the first differential signal corresponding to a difference between the input signal and the output signal, the second differential signal being generated as a signal which is a same phase with a different potential of the first differential signal;
• a first conductivity type first output transistor connected to the first power supply terminal, the first output transistor being configured to receive the first differential signal by an own control terminal, the first output transistor being configured to output a current corresponding to the first differential signal based on the first power supply potential to the output terminal;
• a second conductivity type second output transistor connected to the second power supply terminal, the second output transistor being configured to receive the second differential signal by an own control terminal, the second output transistor being configured to output a current corresponding to the second differential signal based on the second power supply potential to the output terminal;
• a first potential control circuit configured to level-shift a signal level of the first differential signal to a first power supply potential side to generate a first shift signal;
• and
• a first conductivity type third output transistor connected to the first power supply terminal, the third output transistor being configured to receive the first shift signal by an own control terminal, the third output transistor being configured to output a current corresponding to the first shift signal based on the first power supply potential to the output terminal, wherein
• the third output transistor is a transistor having a withstand voltage against a voltage between the first power supply terminal and the control terminal lower than a withstand voltage of the first output transistor and a drain current corresponding to the voltage between the first power supply terminal and the control terminal larger than a drain current of the first output transistor.

A data driver comprising:

• a plurality of amplifier circuits configured to individually amplify a plurality of gradation voltages having respective voltage values corresponding to luminance levels of a plurality of respective pixels, the plurality of amplifier circuits being configured to supply the amplified gradation voltages to a display device, wherein
• the amplifier circuits each include:
• an input terminal configured to receive the gradation voltage as an input signal;
• an output terminal configured to supply an output signal obtained by amplifying the gradation voltage to the display device;
• first and second power supply terminals configured to receive a first power supply potential and a second power supply potential different from the first power supply potential, respectively;
• a differential stage configured to generate a first differential signal and a second differential signal, the first differential signal corresponding to a difference between the input signal and the output signal, the second differential signal being generated as a signal which is a same phase with a different potential of the first differential signal;
• a first conductivity type first output transistor connected to the first power supply terminal, the first output transistor being configured to receive the first differential signal by an own control terminal, the first output transistor being configured to output a current corresponding to the first differential signal based on the first power supply potential to the output terminal;
• a second conductivity type second output transistor connected to the second power supply terminal, the second output transistor being configured to receive the second differential signal by an own control terminal, the second output transistor being configured to output a current corresponding to the second differential signal based on the second power supply potential to the output terminal;
• a first potential control circuit configured to level-shift a signal level of the first differential signal to a first power supply potential side to generate a first shift signal;
• and
• a first conductivity type third output transistor connected to the first power supply terminal, the third output transistor being configured to receive the first shift signal by an own control terminal, the third output transistor being configured to output a current corresponding to the first shift signal based on the first power supply potential to the output terminal, wherein
• the third output transistor is a transistor having a withstand voltage against a voltage between the first power supply terminal and the control terminal lower than a withstand voltage of the first output transistor and a drain current corresponding to the voltage between the first power supply terminal and the control terminal larger than a drain current of the first output transistor.